move IRQ enable/disable into separate header

ver 5.7+ of the CMSIS library (arm_math / DSP) defines these exact same
symbols as "intrinsics" (the ASM is the same), and since CMSIS headers
and imxrt.h are included at some points (e.g. Audio library code) this
needs to be resolved

teensy4/imxrt.h

@@ -1,5 +1,6 @@
 #pragma once
 #include <stdint.h>
+#include <irq.h>
 
 // Definitions based these documents:
 //   i.MX RT1060 Reference Manual, Rev. 2, 12/2019 - https://www.pjrc.com/teensy/datasheets.html
@@ -9477,10 +9478,6 @@ These register are used by the ROM code and should not be used by application so
 #define NVIC_GET_PRIORITY(irqnum) (*((uint8_t *)0xE000E400 + (irqnum)))
 
 
-#define __disable_irq() __asm__ volatile("CPSID i":::"memory");
-#define __enable_irq()  __asm__ volatile("CPSIE i":::"memory");
-
-
 // System Control Space (SCS), ARMv7 ref manual, B3.2, page 708
 #define SCB_CPUID               (*(const    uint32_t *)0xE000ED00) // CPUID Base Register
 #define SCB_ICSR                (*(volatile uint32_t *)0xE000ED04) // Interrupt Control and State

teensy4/irq.h

@@ -0,0 +1,31 @@
+#pragma once
+
+#ifndef   __ASM
+  #define __ASM                                  __asm
+#endif
+#ifndef   __STATIC_FORCEINLINE
+  #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static inline
+#endif
+
+/**
+  \brief   Enable IRQ Interrupts
+  \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+__STATIC_FORCEINLINE void __enable_irq(void)
+{
+  __ASM volatile ("cpsie i" : : : "memory");
+}
+
+
+/**
+  \brief   Disable IRQ Interrupts
+  \details Disables IRQ interrupts by setting the I-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+__STATIC_FORCEINLINE void __disable_irq(void)
+{
+  __ASM volatile ("cpsid i" : : : "memory");
+}
+
+