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#pragma once |
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#pragma once |
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#include <stdint.h> |
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#include <stdint.h> |
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#include <irq.h> |
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// Definitions based these documents: |
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// Definitions based these documents: |
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// i.MX RT1060 Reference Manual, Rev. 2, 12/2019 - https://www.pjrc.com/teensy/datasheets.html |
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// i.MX RT1060 Reference Manual, Rev. 2, 12/2019 - https://www.pjrc.com/teensy/datasheets.html |
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#define NVIC_GET_PRIORITY(irqnum) (*((uint8_t *)0xE000E400 + (irqnum))) |
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#define NVIC_GET_PRIORITY(irqnum) (*((uint8_t *)0xE000E400 + (irqnum))) |
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#define __disable_irq() __asm__ volatile("CPSID i":::"memory"); |
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#define __enable_irq() __asm__ volatile("CPSIE i":::"memory"); |
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// System Control Space (SCS), ARMv7 ref manual, B3.2, page 708 |
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// System Control Space (SCS), ARMv7 ref manual, B3.2, page 708 |
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#define SCB_CPUID (*(const uint32_t *)0xE000ED00) // CPUID Base Register |
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#define SCB_CPUID (*(const uint32_t *)0xE000ED00) // CPUID Base Register |
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#define SCB_ICSR (*(volatile uint32_t *)0xE000ED04) // Interrupt Control and State |
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#define SCB_ICSR (*(volatile uint32_t *)0xE000ED04) // Interrupt Control and State |