Needed to add new Define for clock gate
Plus defines to use the new clock gate, plus correct case name for the
serial6 isr to match what is in system isr table
With the new beta boards, for those users who don't need an SDCard for
their project, it would be great to allow them to use the 6 IO pins
associated with the SDCARD for other purposes. This would probably
require a cheap adapter, but these are nice signals to be able to be
used. They include:
SPI1: SCK, MISO, MOSI, CS0-2
Serail2: TX/RX
Serial4: TX/RX
I2C1: SCL/SDA
This change adds support for GPIO, SPI, Serial2 and Serial4
On T3.2 if you do something like:
Serial2.setTX(31);
Serial2.setRX(26);
Serial2.begin(.9600);
...
Serial2.end();
It will on the end call will always reconfigure pins 9 and 10 to be
digital pins MUX = 1
This is a WIP, But I have now been able to create Serial6 on T3.4 beta,
and so far have tested Send/Receive basic stuff at 115200 and have tried
at several CPU speeds in MHZ (192, 216, 180, 120, 96)
PulseIn may fail on LC as it is using *reg to test the value for on or
off, but on LC register is a bitmask associated with several IO pins.
So split off for LC to use the MASK value for the pin to test high and
low.
Warning did not update timings for this, which may be necessary as adds
an & in the loop. However when I tried TLC for 5000us timeout, it timed
out with 5138us, if I decremented the PULSEIN_LOOPS_PER_USEC by one,
then it timed out at 4398... This was at 49mhz.