PaulStoffregen
73ea157600
Add comment with link to PORT_PCR_ISF polling example
il y a 5 ans
PaulStoffregen
019c928ac4
Add empty cache functions, for T4 backwards compatibility
il y a 5 ans
dav1901
59402d1e7e
Fix typo
il y a 6 ans
Frank Bösing
11bd76352d
FCPU 256MHz
il y a 6 ans
PaulStoffregen
6d441162e6
Fix FTM_CONF register bitfield defs
il y a 6 ans
PaulStoffregen
93592e54ae
Add link to forum thread about RNGA code & results
il y a 7 ans
Kurt Eckhardt
75686fe6ad
Anther changed need to support CS on 45
Changed needed to support pin 45 on C3.5/6 as it is CS5 which encodes as 0x20...
il y a 7 ans
Kurt Eckhardt
8ce0b58c33
T3.5/6 - Has PCS5
As per liljaywalker member
Teensy 3.5/6 on Pin 45 have PCS5,
which the current Macro
SPI-PUSHR_PCS(n) will not work with.
il y a 7 ans
duff2013
94346adeac
TeensyLC does not have CMP1 and CMP2
il y a 7 ans
crteensy
f8a71be463
Update kinetis.h
Add VREF_SC_MODE_LV constants
il y a 7 ans
PaulStoffregen
e77b120f7b
Use PendSV for EventResponder attachInterrupt
il y a 7 ans
PaulStoffregen
7099935c0e
Update open source license info
il y a 7 ans
PaulStoffregen
490d83c942
Fix SPI1 & SPI2 DMA mux defines for Teensy 3.5
il y a 7 ans
PaulStoffregen
cda660cf67
Add Field bits for external wake up in LLWU (thanks yoonghm)
Fixes #239
il y a 7 ans
Frank
061dcfc4ee
add SMC_STOPCTRL ( #237 )
* add SMC_STOPCTRL
https://forum.pjrc.com/threads/43362-SMC_VLLSCTRL-register-is-not-found-in-K66-(Teensy-3-6)
* Update kinetis.h
il y a 7 ans
YoongHM
94309bc71b
Bit fields for RTC_IER
Easy field manipulation for RTC_IER register
il y a 7 ans
Tilo Nitzsche
91190e6cf4
Revert "Fix malloc corrupting the stack. Added new function reserve_stack() to adjust the amount of memory reserved for the stack."
Different version applied upstream.
This reverts commit c5bdda910b
.
il y a 7 ans
PaulStoffregen
055b1ab770
Add register bit defs for DAC & PDB DAC trigger
il y a 7 ans
PaulStoffregen
3ff62c9798
Add defs for digital input filters
il y a 7 ans
Tilo Nitzsche
c5bdda910b
Fix malloc corrupting the stack. Added new function reserve_stack() to adjust the amount of memory reserved for the stack.
il y a 7 ans
duff2013
70e53f0986
Teensy 3.5 does not have 32ch llwu ( #204 )
il y a 8 ans
PaulStoffregen
f9813d201b
Rewrite IntervalTimer
il y a 8 ans
Alexander Shtuchkin
c7c0ce05aa
Fix compile warnings related to kinetis_hsrun_enable
il y a 8 ans
PaulStoffregen
809482c72e
Only implement HSRUN changes when F_CPU > 120 MHz
il y a 8 ans
PaulStoffregen
27fa2e2a52
Use USB clock recovery when running USB from IRC48M oscillator
il y a 8 ans
PaulStoffregen
1bdf4faa90
Add HSRUN functions
il y a 8 ans
PaulStoffregen
b04b9f6689
Add HAS_KINETIS_SDHC for Teensy 3.5 & 3.6
il y a 8 ans
concreteboot
1ec34883ca
nbytes transfer count when minor loop enabled is 10 bits not 5
il y a 8 ans
Kurt Eckhardt
310f359860
Wrong DMAMUX Source for SPI0_TX
il y a 8 ans
Kurt Eckhardt
426a53c281
Fix Serial6 for Teensy 3.5
Needed to add new Define for clock gate
Plus defines to use the new clock gate, plus correct case name for the
serial6 isr to match what is in system isr table
il y a 8 ans
PaulStoffregen
0ed6ba9a96
Fix USB serial number on K64 & K66
il y a 8 ans
PaulStoffregen
ce27c4c50b
Add misc SDHC register bitfield defs
il y a 8 ans
Kurt Eckhardt
899cbecc02
Enable Uart 2 stop bit capabilities
The T-LC and the new beta boards T3.6 and soon T3.5 hardware uarts have
ability to turn on 2 stop bits. So enabled on these boards.
il y a 8 ans
Kurt Eckhardt
7352ea7791
Add Serial6 - T3.4 Uart5, T3.5 LPUart0
This is a WIP, But I have now been able to create Serial6 on T3.4 beta,
and so far have tested Send/Receive basic stuff at 115200 and have tried
at several CPU speeds in MHZ (192, 216, 180, 120, 96)
il y a 8 ans
duff2013
c5c14007bb
trigger mode enable cmp register def
il y a 8 ans
Frank
61dce339b0
fix SDHC_XFERTYP_RSPTYP
il y a 8 ans
PaulStoffregen
31c9626281
Fix some USBHS register bit names
il y a 8 ans
duff2013
484098c794
update LLWU reg.
il y a 8 ans
PaulStoffregen
9f1f15a53e
Add SDHC register bit defs
il y a 8 ans
PaulStoffregen
0e35a31068
Add ethernet register bit defs
il y a 8 ans
PaulStoffregen
fdf57f66c6
Add USBHS register bit defs
il y a 8 ans
Kurt Eckhardt
1c2f6dca35
Optional: Add SPI2...
Just in case the extra pads are added to bottom of 3.4/3.5 board,
define is in place...
il y a 8 ans
Kurt Eckhardt
305fb4da93
SPI1 on T3.4/3.5 - Add SPCR1
il y a 8 ans
Kurt Eckhardt
91f8f30c04
Add SPI1 to kinetis.h for T3.4 and T3.5
Added define for SPI1 registers
il y a 8 ans
PaulStoffregen
d79723c252
Easier F_BUS overclocking
il y a 8 ans
PaulStoffregen
be42e0574e
Fix DMA on K66
il y a 8 ans
PaulStoffregen
e2e07e5394
Fix DMAMUX for K66
il y a 8 ans
PaulStoffregen
ddb7fb0267
Add I2C clock divider names
il y a 8 ans
PaulStoffregen
759ba1b417
Fix touchRead on K66
il y a 8 ans
PaulStoffregen
7a2c0037b8
Use IRC48M clock for USB when F_CPU is 180 or 216 MHz
il y a 8 ans