https://forum.pjrc.com/threads/40893-Incorrect-return-for-Serial-write()-on-Teensy-3-6?p=127732#post127732

I'm not sure if this fix has some side-effects - how will other functions react when it does not return zero anymore ?

https://forum.pjrc.com/threads/40893-Incorrect-return-for-Serial-write()-on-Teensy-3-6?p=127764&viewfull=1#post127764

AudioStream.h: Allow inclusion from assembler .S files

Additional PR for SERIALX_DISABLE follows

The spaces after TOOLSPATH will append to the variable value. Merged the on Linux comment with previous comment to fix.

Earlier I had pin 20 as the default SCK1, but card shows that pin 32 is
the default pin

close hole for race condition

Has to add core_pins.h to get delayMicroseconds()
made empty while()'s on HSRUN state change have a measurable 2us wait
each iteration
added explicit 100us delay leaving HSRUN to allow internal V to
satbilize, seems CPU does this already as 10-50 us made no change, and
100 is not measurable on larger writes.
since eeprom_initialize() blindly restores interrupts amd can run under
HSRUN, moved hsrun_off()

EEPROM write on T_3.6 under HSRUN - Drop and Raise

https://forum.pjrc.com/threads/34808-K66-Beta-Test?p=116690&viewfull=1#post116690

Results in valid serial # presented to USB host when T_3.6 is in HSRUN mode.

Added in the additional SPI pins
MISO 39
MOSI 28
SCK 27

Tested with my ILI9341_t3n (SPIN) version.  Will also
Add to ILI9341_t3.

Recent additions did not update these counts.

Seperated T3.5 from T3.6 as PWM and Analog counts are different

Needed to add new Define for clock gate

Plus defines to use the new clock gate, plus correct case name for the
serial6 isr to match what is in system isr table