Move AVR INT mapping to cpp file

SPI.cpp

 	SPCR &= ~_BV(SPE);
 }
 
+// mapping of interrupt numbers to bits within SPI_AVR_EIMSK
+#if defined(__AVR_ATmega32U4__)
+  #define SPI_INT0_MASK  (1<<INT0)
+  #define SPI_INT1_MASK  (1<<INT1)
+  #define SPI_INT2_MASK  (1<<INT2)
+  #define SPI_INT3_MASK  (1<<INT3)
+  #define SPI_INT4_MASK  (1<<INT6)
+#elif defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB1286__)
+  #define SPI_INT0_MASK  (1<<INT0)
+  #define SPI_INT1_MASK  (1<<INT1)
+  #define SPI_INT2_MASK  (1<<INT2)
+  #define SPI_INT3_MASK  (1<<INT3)
+  #define SPI_INT4_MASK  (1<<INT4)
+  #define SPI_INT5_MASK  (1<<INT5)
+  #define SPI_INT6_MASK  (1<<INT6)
+  #define SPI_INT7_MASK  (1<<INT7)
+#elif defined(EICRA) && defined(EICRB) && defined(EIMSK)
+  #define SPI_INT0_MASK  (1<<INT4)
+  #define SPI_INT1_MASK  (1<<INT5)
+  #define SPI_INT2_MASK  (1<<INT0)
+  #define SPI_INT3_MASK  (1<<INT1)
+  #define SPI_INT4_MASK  (1<<INT2)
+  #define SPI_INT5_MASK  (1<<INT3)
+  #define SPI_INT6_MASK  (1<<INT6)
+  #define SPI_INT7_MASK  (1<<INT7)
+#else
+  #ifdef INT0
+  #define SPI_INT0_MASK  (1<<INT0)
+  #endif
+  #ifdef INT1
+  #define SPI_INT1_MASK  (1<<INT1)
+  #endif
+  #ifdef INT2
+  #define SPI_INT2_MASK  (1<<INT2)
+  #endif
+#endif
+
 void SPIClass::usingInterrupt(uint8_t interruptNumber)
 {
 	uint8_t mask;

SPI.h

 	static uint8_t interruptSave; // temp storage, to restore state
 };
 
-// mapping of interrupt numbers to bits within SPI_AVR_EIMSK
-#if defined(__AVR_ATmega32U4__)
-  #define SPI_INT0_MASK	 (1<<INT0)
-  #define SPI_INT1_MASK	 (1<<INT1)
-  #define SPI_INT2_MASK	 (1<<INT2)
-  #define SPI_INT3_MASK	 (1<<INT3)
-  #define SPI_INT4_MASK	 (1<<INT6)
-#elif defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB1286__)
-  #define SPI_INT0_MASK	 (1<<INT0)
-  #define SPI_INT1_MASK	 (1<<INT1)
-  #define SPI_INT2_MASK	 (1<<INT2)
-  #define SPI_INT3_MASK	 (1<<INT3)
-  #define SPI_INT4_MASK	 (1<<INT4)
-  #define SPI_INT5_MASK	 (1<<INT5)
-  #define SPI_INT6_MASK	 (1<<INT6)
-  #define SPI_INT7_MASK	 (1<<INT7)
-#elif defined(EICRA) && defined(EICRB) && defined(EIMSK)
-  #define SPI_INT0_MASK	 (1<<INT4)
-  #define SPI_INT1_MASK	 (1<<INT5)
-  #define SPI_INT2_MASK	 (1<<INT0)
-  #define SPI_INT3_MASK	 (1<<INT1)
-  #define SPI_INT4_MASK	 (1<<INT2)
-  #define SPI_INT5_MASK	 (1<<INT3)
-  #define SPI_INT6_MASK	 (1<<INT6)
-  #define SPI_INT7_MASK	 (1<<INT7)
-#else
-  #ifdef INT0
-  #define SPI_INT0_MASK	 (1<<INT0)
-  #endif
-  #ifdef INT1
-  #define SPI_INT1_MASK	 (1<<INT1)
-  #endif
-  #ifdef INT2
-  #define SPI_INT2_MASK	 (1<<INT2)
-  #endif
-#endif
 
 
 /**********************************************************/