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ARM_002dRelocations.html 5.5KB

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  15. <title>ARM-Relocations (Using as)</title>
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  56. <a name="ARM_002dRelocations"></a>
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  59. Next: <a href="ARM_002dNeon_002dAlignment.html#ARM_002dNeon_002dAlignment" accesskey="n" rel="next">ARM-Neon-Alignment</a>, Previous: <a href="ARM_002dRegs.html#ARM_002dRegs" accesskey="p" rel="prev">ARM-Regs</a>, Up: <a href="ARM-Syntax.html#ARM-Syntax" accesskey="u" rel="up">ARM Syntax</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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  61. <hr>
  62. <a name="ARM-relocation-generation"></a>
  63. <h4 class="subsubsection">9.4.2.4 ARM relocation generation</h4>
  64. <a name="index-data-relocations_002c-ARM"></a>
  65. <a name="index-ARM-data-relocations"></a>
  66. <p>Specific data relocations can be generated by putting the relocation name
  67. in parentheses after the symbol name. For example:
  68. </p>
  69. <div class="smallexample">
  70. <pre class="smallexample"> .word foo(TARGET1)
  71. </pre></div>
  72. <p>This will generate an &lsquo;<samp>R_ARM_TARGET1</samp>&rsquo; relocation against the symbol
  73. <var>foo</var>.
  74. The following relocations are supported:
  75. <code>GOT</code>,
  76. <code>GOTOFF</code>,
  77. <code>TARGET1</code>,
  78. <code>TARGET2</code>,
  79. <code>SBREL</code>,
  80. <code>TLSGD</code>,
  81. <code>TLSLDM</code>,
  82. <code>TLSLDO</code>,
  83. <code>TLSDESC</code>,
  84. <code>TLSCALL</code>,
  85. <code>GOTTPOFF</code>,
  86. <code>GOT_PREL</code>
  87. and
  88. <code>TPOFF</code>.
  89. </p>
  90. <p>For compatibility with older toolchains the assembler also accepts
  91. <code>(PLT)</code> after branch targets. On legacy targets this will
  92. generate the deprecated &lsquo;<samp>R_ARM_PLT32</samp>&rsquo; relocation. On EABI
  93. targets it will encode either the &lsquo;<samp>R_ARM_CALL</samp>&rsquo; or
  94. &lsquo;<samp>R_ARM_JUMP24</samp>&rsquo; relocation, as appropriate.
  95. </p>
  96. <a name="index-MOVW-and-MOVT-relocations_002c-ARM"></a>
  97. <p>Relocations for &lsquo;<samp>MOVW</samp>&rsquo; and &lsquo;<samp>MOVT</samp>&rsquo; instructions can be generated
  98. by prefixing the value with &lsquo;<samp>#:lower16:</samp>&rsquo; and &lsquo;<samp>#:upper16</samp>&rsquo;
  99. respectively. For example to load the 32-bit address of foo into r0:
  100. </p>
  101. <div class="smallexample">
  102. <pre class="smallexample"> MOVW r0, #:lower16:foo
  103. MOVT r0, #:upper16:foo
  104. </pre></div>
  105. <p>Relocations &lsquo;<samp>R_ARM_THM_ALU_ABS_G0_NC</samp>&rsquo;, &lsquo;<samp>R_ARM_THM_ALU_ABS_G1_NC</samp>&rsquo;,
  106. &lsquo;<samp>R_ARM_THM_ALU_ABS_G2_NC</samp>&rsquo; and &lsquo;<samp>R_ARM_THM_ALU_ABS_G3_NC</samp>&rsquo; can be
  107. generated by prefixing the value with &lsquo;<samp>#:lower0_7:#</samp>&rsquo;,
  108. &lsquo;<samp>#:lower8_15:#</samp>&rsquo;, &lsquo;<samp>#:upper0_7:#</samp>&rsquo; and &lsquo;<samp>#:upper8_15:#</samp>&rsquo;
  109. respectively. For example to load the 32-bit address of foo into r0:
  110. </p>
  111. <div class="smallexample">
  112. <pre class="smallexample"> MOVS r0, #:upper8_15:#foo
  113. LSLS r0, r0, #8
  114. ADDS r0, #:upper0_7:#foo
  115. LSLS r0, r0, #8
  116. ADDS r0, #:lower8_15:#foo
  117. LSLS r0, r0, #8
  118. ADDS r0, #:lower0_7:#foo
  119. </pre></div>
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