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i386-Features.html 7.9KB

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  16. <title>i386 Features (Debugging with GDB)</title>
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  57. <a name="i386-Features"></a>
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  59. <p>
  60. Next: <a href="MicroBlaze-Features.html#MicroBlaze-Features" accesskey="n" rel="next">MicroBlaze Features</a>, Previous: <a href="ARM-Features.html#ARM-Features" accesskey="p" rel="prev">ARM Features</a>, Up: <a href="Standard-Target-Features.html#Standard-Target-Features" accesskey="u" rel="up">Standard Target Features</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Concept-Index.html#Concept-Index" title="Index" rel="index">Index</a>]</p>
  61. </div>
  62. <hr>
  63. <a name="i386-Features-1"></a>
  64. <h4 class="subsection">G.5.4 i386 Features</h4>
  65. <a name="index-target-descriptions_002c-i386-features"></a>
  66. <p>The &lsquo;<samp>org.gnu.gdb.i386.core</samp>&rsquo; feature is required for i386/amd64
  67. targets. It should describe the following registers:
  68. </p>
  69. <ul class="no-bullet">
  70. <li>- &lsquo;<samp>eax</samp>&rsquo; through &lsquo;<samp>edi</samp>&rsquo; plus &lsquo;<samp>eip</samp>&rsquo; for i386
  71. </li><li>- &lsquo;<samp>rax</samp>&rsquo; through &lsquo;<samp>r15</samp>&rsquo; plus &lsquo;<samp>rip</samp>&rsquo; for amd64
  72. </li><li>- &lsquo;<samp>eflags</samp>&rsquo;, &lsquo;<samp>cs</samp>&rsquo;, &lsquo;<samp>ss</samp>&rsquo;, &lsquo;<samp>ds</samp>&rsquo;, &lsquo;<samp>es</samp>&rsquo;,
  73. &lsquo;<samp>fs</samp>&rsquo;, &lsquo;<samp>gs</samp>&rsquo;
  74. </li><li>- &lsquo;<samp>st0</samp>&rsquo; through &lsquo;<samp>st7</samp>&rsquo;
  75. </li><li>- &lsquo;<samp>fctrl</samp>&rsquo;, &lsquo;<samp>fstat</samp>&rsquo;, &lsquo;<samp>ftag</samp>&rsquo;, &lsquo;<samp>fiseg</samp>&rsquo;, &lsquo;<samp>fioff</samp>&rsquo;,
  76. &lsquo;<samp>foseg</samp>&rsquo;, &lsquo;<samp>fooff</samp>&rsquo; and &lsquo;<samp>fop</samp>&rsquo;
  77. </li></ul>
  78. <p>The register sets may be different, depending on the target.
  79. </p>
  80. <p>The &lsquo;<samp>org.gnu.gdb.i386.sse</samp>&rsquo; feature is optional. It should
  81. describe registers:
  82. </p>
  83. <ul class="no-bullet">
  84. <li>- &lsquo;<samp>xmm0</samp>&rsquo; through &lsquo;<samp>xmm7</samp>&rsquo; for i386
  85. </li><li>- &lsquo;<samp>xmm0</samp>&rsquo; through &lsquo;<samp>xmm15</samp>&rsquo; for amd64
  86. </li><li>- &lsquo;<samp>mxcsr</samp>&rsquo;
  87. </li></ul>
  88. <p>The &lsquo;<samp>org.gnu.gdb.i386.avx</samp>&rsquo; feature is optional and requires the
  89. &lsquo;<samp>org.gnu.gdb.i386.sse</samp>&rsquo; feature. It should
  90. describe the upper 128 bits of <small>YMM</small> registers:
  91. </p>
  92. <ul class="no-bullet">
  93. <li>- &lsquo;<samp>ymm0h</samp>&rsquo; through &lsquo;<samp>ymm7h</samp>&rsquo; for i386
  94. </li><li>- &lsquo;<samp>ymm0h</samp>&rsquo; through &lsquo;<samp>ymm15h</samp>&rsquo; for amd64
  95. </li></ul>
  96. <p>The &lsquo;<samp>org.gnu.gdb.i386.mpx</samp>&rsquo; is an optional feature representing Intel
  97. Memory Protection Extension (MPX). It should describe the following registers:
  98. </p>
  99. <ul class="no-bullet">
  100. <li>- &lsquo;<samp>bnd0raw</samp>&rsquo; through &lsquo;<samp>bnd3raw</samp>&rsquo; for i386 and amd64.
  101. </li><li>- &lsquo;<samp>bndcfgu</samp>&rsquo; and &lsquo;<samp>bndstatus</samp>&rsquo; for i386 and amd64.
  102. </li></ul>
  103. <p>The &lsquo;<samp>org.gnu.gdb.i386.linux</samp>&rsquo; feature is optional. It should
  104. describe a single register, &lsquo;<samp>orig_eax</samp>&rsquo;.
  105. </p>
  106. <p>The &lsquo;<samp>org.gnu.gdb.i386.segments</samp>&rsquo; feature is optional. It should
  107. describe two system registers: &lsquo;<samp>fs_base</samp>&rsquo; and &lsquo;<samp>gs_base</samp>&rsquo;.
  108. </p>
  109. <p>The &lsquo;<samp>org.gnu.gdb.i386.avx512</samp>&rsquo; feature is optional and requires the
  110. &lsquo;<samp>org.gnu.gdb.i386.avx</samp>&rsquo; feature. It should
  111. describe additional <small>XMM</small> registers:
  112. </p>
  113. <ul class="no-bullet">
  114. <li>- &lsquo;<samp>xmm16h</samp>&rsquo; through &lsquo;<samp>xmm31h</samp>&rsquo;, only valid for amd64.
  115. </li></ul>
  116. <p>It should describe the upper 128 bits of additional <small>YMM</small> registers:
  117. </p>
  118. <ul class="no-bullet">
  119. <li>- &lsquo;<samp>ymm16h</samp>&rsquo; through &lsquo;<samp>ymm31h</samp>&rsquo;, only valid for amd64.
  120. </li></ul>
  121. <p>It should
  122. describe the upper 256 bits of <small>ZMM</small> registers:
  123. </p>
  124. <ul class="no-bullet">
  125. <li>- &lsquo;<samp>zmm0h</samp>&rsquo; through &lsquo;<samp>zmm7h</samp>&rsquo; for i386.
  126. </li><li>- &lsquo;<samp>zmm0h</samp>&rsquo; through &lsquo;<samp>zmm15h</samp>&rsquo; for amd64.
  127. </li></ul>
  128. <p>It should
  129. describe the additional <small>ZMM</small> registers:
  130. </p>
  131. <ul class="no-bullet">
  132. <li>- &lsquo;<samp>zmm16h</samp>&rsquo; through &lsquo;<samp>zmm31h</samp>&rsquo;, only valid for amd64.
  133. </li></ul>
  134. <p>The &lsquo;<samp>org.gnu.gdb.i386.pkeys</samp>&rsquo; feature is optional. It should
  135. describe a single register, &lsquo;<samp>pkru</samp>&rsquo;. It is a 32-bit register
  136. valid for i386 and amd64.
  137. </p>
  138. <hr>
  139. <div class="header">
  140. <p>
  141. Next: <a href="MicroBlaze-Features.html#MicroBlaze-Features" accesskey="n" rel="next">MicroBlaze Features</a>, Previous: <a href="ARM-Features.html#ARM-Features" accesskey="p" rel="prev">ARM Features</a>, Up: <a href="Standard-Target-Features.html#Standard-Target-Features" accesskey="u" rel="up">Standard Target Features</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Concept-Index.html#Concept-Index" title="Index" rel="index">Index</a>]</p>
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