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- <a name="i386-Features"></a>
- <div class="header">
- <p>
- Next: <a href="MicroBlaze-Features.html#MicroBlaze-Features" accesskey="n" rel="next">MicroBlaze Features</a>, Previous: <a href="ARM-Features.html#ARM-Features" accesskey="p" rel="prev">ARM Features</a>, Up: <a href="Standard-Target-Features.html#Standard-Target-Features" accesskey="u" rel="up">Standard Target Features</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Concept-Index.html#Concept-Index" title="Index" rel="index">Index</a>]</p>
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- <hr>
- <a name="i386-Features-1"></a>
- <h4 class="subsection">G.5.4 i386 Features</h4>
- <a name="index-target-descriptions_002c-i386-features"></a>
-
- <p>The ‘<samp>org.gnu.gdb.i386.core</samp>’ feature is required for i386/amd64
- targets. It should describe the following registers:
- </p>
- <ul class="no-bullet">
- <li>- ‘<samp>eax</samp>’ through ‘<samp>edi</samp>’ plus ‘<samp>eip</samp>’ for i386
- </li><li>- ‘<samp>rax</samp>’ through ‘<samp>r15</samp>’ plus ‘<samp>rip</samp>’ for amd64
- </li><li>- ‘<samp>eflags</samp>’, ‘<samp>cs</samp>’, ‘<samp>ss</samp>’, ‘<samp>ds</samp>’, ‘<samp>es</samp>’,
- ‘<samp>fs</samp>’, ‘<samp>gs</samp>’
- </li><li>- ‘<samp>st0</samp>’ through ‘<samp>st7</samp>’
- </li><li>- ‘<samp>fctrl</samp>’, ‘<samp>fstat</samp>’, ‘<samp>ftag</samp>’, ‘<samp>fiseg</samp>’, ‘<samp>fioff</samp>’,
- ‘<samp>foseg</samp>’, ‘<samp>fooff</samp>’ and ‘<samp>fop</samp>’
- </li></ul>
-
- <p>The register sets may be different, depending on the target.
- </p>
- <p>The ‘<samp>org.gnu.gdb.i386.sse</samp>’ feature is optional. It should
- describe registers:
- </p>
- <ul class="no-bullet">
- <li>- ‘<samp>xmm0</samp>’ through ‘<samp>xmm7</samp>’ for i386
- </li><li>- ‘<samp>xmm0</samp>’ through ‘<samp>xmm15</samp>’ for amd64
- </li><li>- ‘<samp>mxcsr</samp>’
- </li></ul>
-
- <p>The ‘<samp>org.gnu.gdb.i386.avx</samp>’ feature is optional and requires the
- ‘<samp>org.gnu.gdb.i386.sse</samp>’ feature. It should
- describe the upper 128 bits of <small>YMM</small> registers:
- </p>
- <ul class="no-bullet">
- <li>- ‘<samp>ymm0h</samp>’ through ‘<samp>ymm7h</samp>’ for i386
- </li><li>- ‘<samp>ymm0h</samp>’ through ‘<samp>ymm15h</samp>’ for amd64
- </li></ul>
-
- <p>The ‘<samp>org.gnu.gdb.i386.mpx</samp>’ is an optional feature representing Intel
- Memory Protection Extension (MPX). It should describe the following registers:
- </p>
- <ul class="no-bullet">
- <li>- ‘<samp>bnd0raw</samp>’ through ‘<samp>bnd3raw</samp>’ for i386 and amd64.
- </li><li>- ‘<samp>bndcfgu</samp>’ and ‘<samp>bndstatus</samp>’ for i386 and amd64.
- </li></ul>
-
- <p>The ‘<samp>org.gnu.gdb.i386.linux</samp>’ feature is optional. It should
- describe a single register, ‘<samp>orig_eax</samp>’.
- </p>
- <p>The ‘<samp>org.gnu.gdb.i386.segments</samp>’ feature is optional. It should
- describe two system registers: ‘<samp>fs_base</samp>’ and ‘<samp>gs_base</samp>’.
- </p>
- <p>The ‘<samp>org.gnu.gdb.i386.avx512</samp>’ feature is optional and requires the
- ‘<samp>org.gnu.gdb.i386.avx</samp>’ feature. It should
- describe additional <small>XMM</small> registers:
- </p>
- <ul class="no-bullet">
- <li>- ‘<samp>xmm16h</samp>’ through ‘<samp>xmm31h</samp>’, only valid for amd64.
- </li></ul>
-
- <p>It should describe the upper 128 bits of additional <small>YMM</small> registers:
- </p>
- <ul class="no-bullet">
- <li>- ‘<samp>ymm16h</samp>’ through ‘<samp>ymm31h</samp>’, only valid for amd64.
- </li></ul>
-
- <p>It should
- describe the upper 256 bits of <small>ZMM</small> registers:
- </p>
- <ul class="no-bullet">
- <li>- ‘<samp>zmm0h</samp>’ through ‘<samp>zmm7h</samp>’ for i386.
- </li><li>- ‘<samp>zmm0h</samp>’ through ‘<samp>zmm15h</samp>’ for amd64.
- </li></ul>
-
- <p>It should
- describe the additional <small>ZMM</small> registers:
- </p>
- <ul class="no-bullet">
- <li>- ‘<samp>zmm16h</samp>’ through ‘<samp>zmm31h</samp>’, only valid for amd64.
- </li></ul>
-
- <p>The ‘<samp>org.gnu.gdb.i386.pkeys</samp>’ feature is optional. It should
- describe a single register, ‘<samp>pkru</samp>’. It is a 32-bit register
- valid for i386 and amd64.
- </p>
- <hr>
- <div class="header">
- <p>
- Next: <a href="MicroBlaze-Features.html#MicroBlaze-Features" accesskey="n" rel="next">MicroBlaze Features</a>, Previous: <a href="ARM-Features.html#ARM-Features" accesskey="p" rel="prev">ARM Features</a>, Up: <a href="Standard-Target-Features.html#Standard-Target-Features" accesskey="u" rel="up">Standard Target Features</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Concept-Index.html#Concept-Index" title="Index" rel="index">Index</a>]</p>
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