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<a name="BPF-Opcodes"></a>
<div class="header">
<p>
Previous: <a href="BPF-Directives.html#BPF-Directives" accesskey="p" rel="prev">BPF Directives</a>, Up: <a href="BPF_002dDependent.html#BPF_002dDependent" accesskey="u" rel="up">BPF-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
</div>
<hr>
<a name="Opcodes-5"></a>
<h4 class="subsection">9.7.4 Opcodes</h4>

<a name="index-BPF-opcodes"></a>
<a name="index-opcodes-for-BPF"></a>
<p>In the instruction descriptions below the following field descriptors
are used:
</p>
<dl compact="compact">
<dt><code>%d</code></dt>
<dd><p>Destination general-purpose register whose role is to be destination
of an operation.
</p></dd>
<dt><code>%s</code></dt>
<dd><p>Source general-purpose register whose role is to be the source of an
operation.
</p></dd>
<dt><code>disp16</code></dt>
<dd><p>16-bit signed PC-relative offset, measured in number of 64-bit words,
minus one.
</p></dd>
<dt><code>disp32</code></dt>
<dd><p>32-bit signed PC-relative offset, measured in number of 64-bit words,
minus one.
</p></dd>
<dt><code>offset16</code></dt>
<dd><p>Signed 16-bit immediate.
</p></dd>
<dt><code>imm32</code></dt>
<dd><p>Signed 32-bit immediate.
</p></dd>
<dt><code>imm64</code></dt>
<dd><p>Signed 64-bit immediate.
</p></dd>
</dl>

<a name="Arithmetic-instructions"></a>
<h4 class="subsubsection">9.7.4.1 Arithmetic instructions</h4>

<p>The destination register in these instructions act like an
accumulator.
</p>
<dl compact="compact">
<dt><code>add %d, (%s|imm32)</code></dt>
<dd><p>64-bit arithmetic addition.
</p></dd>
<dt><code>sub %d, (%s|imm32)</code></dt>
<dd><p>64-bit arithmetic subtraction.
</p></dd>
<dt><code>mul %d, (%s|imm32)</code></dt>
<dd><p>64-bit arithmetic multiplication.
</p></dd>
<dt><code>div %d, (%s|imm32)</code></dt>
<dd><p>64-bit arithmetic integer division.
</p></dd>
<dt><code>mod %d, (%s|imm32)</code></dt>
<dd><p>64-bit integer remainder.
</p></dd>
<dt><code>and %d, (%s|imm32)</code></dt>
<dd><p>64-bit bit-wise &ldquo;and&rdquo; operation.
</p></dd>
<dt><code>or %d, (%s|imm32)</code></dt>
<dd><p>64-bit bit-wise &ldquo;or&rdquo; operation.
</p></dd>
<dt><code>xor %d, (%s|imm32)</code></dt>
<dd><p>64-bit bit-wise exclusive-or operation.
</p></dd>
<dt><code>lsh %d, (%s|imm32)</code></dt>
<dd><p>64-bit left shift, by <code>%s</code> or <code>imm32</code> bits.
</p></dd>
<dt><code>rsh %d, (%s|imm32)</code></dt>
<dd><p>64-bit right logical shift, by <code>%s</code> or <code>imm32</code> bits.
</p></dd>
<dt><code>arsh %d, (%s|imm32)</code></dt>
<dd><p>64-bit right arithmetic shift, by <code>%s</code> or <code>imm32</code> bits.
</p></dd>
<dt><code>neg %d</code></dt>
<dd><p>64-bit arithmetic negation.
</p></dd>
<dt><code>mov %d, (%s|imm32)</code></dt>
<dd><p>Move the 64-bit value of <code>%s</code> in <code>%d</code>, or load <code>imm32</code>
in <code>%d</code>.
</p></dd>
</dl>

<a name="g_t32_002dbit-arithmetic-instructions"></a>
<h4 class="subsubsection">9.7.4.2 32-bit arithmetic instructions</h4>

<p>The destination register in these instructions act as an accumulator.
</p>
<dl compact="compact">
<dt><code>add32 %d, (%s|imm32)</code></dt>
<dd><p>32-bit arithmetic addition.
</p></dd>
<dt><code>sub32 %d, (%s|imm32)</code></dt>
<dd><p>32-bit arithmetic subtraction.
</p></dd>
<dt><code>mul32 %d, (%s|imm32)</code></dt>
<dd><p>32-bit arithmetic multiplication.
</p></dd>
<dt><code>div32 %d, (%s|imm32)</code></dt>
<dd><p>32-bit arithmetic integer division.
</p></dd>
<dt><code>mod32 %d, (%s|imm32)</code></dt>
<dd><p>32-bit integer remainder.
</p></dd>
<dt><code>and32 %d, (%s|imm32)</code></dt>
<dd><p>32-bit bit-wise &ldquo;and&rdquo; operation.
</p></dd>
<dt><code>or32 %d, (%s|imm32)</code></dt>
<dd><p>32-bit bit-wise &ldquo;or&rdquo; operation.
</p></dd>
<dt><code>xor32 %d, (%s|imm32)</code></dt>
<dd><p>32-bit bit-wise exclusive-or operation.
</p></dd>
<dt><code>lsh32 %d, (%s|imm32)</code></dt>
<dd><p>32-bit left shift, by <code>%s</code> or <code>imm32</code> bits.
</p></dd>
<dt><code>rsh32 %d, (%s|imm32)</code></dt>
<dd><p>32-bit right logical shift, by <code>%s</code> or <code>imm32</code> bits.
</p></dd>
<dt><code>arsh32 %d, (%s|imm32)</code></dt>
<dd><p>32-bit right arithmetic shift, by <code>%s</code> or <code>imm32</code> bits.
</p></dd>
<dt><code>neg32 %d</code></dt>
<dd><p>32-bit arithmetic negation.
</p></dd>
<dt><code>mov32 %d, (%s|imm32)</code></dt>
<dd><p>Move the 32-bit value of <code>%s</code> in <code>%d</code>, or load <code>imm32</code>
in <code>%d</code>.
</p></dd>
</dl>

<a name="Endianness-conversion-instructions"></a>
<h4 class="subsubsection">9.7.4.3 Endianness conversion instructions</h4>

<dl compact="compact">
<dt><code>endle %d, (8|16|32)</code></dt>
<dd><p>Convert the 8-bit, 16-bit or 32-bit value in <code>%d</code> to
little-endian.
</p></dd>
<dt><code>endbe %d, (8|16|32)</code></dt>
<dd><p>Convert the 8-bit, 16-bit or 32-bit value in <code>%d</code> to big-endian.
</p></dd>
</dl>

<a name="g_t64_002dbit-load-and-pseudo-maps"></a>
<h4 class="subsubsection">9.7.4.4 64-bit load and pseudo maps</h4>

<dl compact="compact">
<dt><code>lddw %d, imm64</code></dt>
<dd><p>Load the given signed 64-bit immediate, or pseudo map descriptor, to
the destination register <code>%d</code>.
</p></dd>
<dt><code>lddw %d, %map_fd(N)</code></dt>
<dd><p>Load the address of the given pseudo map fd <em>N</em> to the
destination register <code>%d</code>.
</p></dd>
</dl>

<a name="Load-instructions-for-socket-filters"></a>
<h4 class="subsubsection">9.7.4.5 Load instructions for socket filters</h4>

<p>The following instructions are intended to be used in socket filters,
and are therefore not general-purpose: they make assumptions on the
contents of several registers.  See the file
<samp>Documentation/networking/filter.txt</samp> in the Linux kernel source
tree for more information.
</p>
<p>Absolute loads:
</p>
<dl compact="compact">
<dt><code>ldabsdw imm32</code></dt>
<dd><p>Absolute 64-bit load.
</p></dd>
<dt><code>ldabsw imm32</code></dt>
<dd><p>Absolute 32-bit load.
</p></dd>
<dt><code>ldabsh imm32</code></dt>
<dd><p>Absolute 16-bit load.
</p></dd>
<dt><code>ldabsb imm32</code></dt>
<dd><p>Absolute 8-bit load.
</p></dd>
</dl>

<p>Indirect loads:
</p>
<dl compact="compact">
<dt><code>ldinddw %s, imm32</code></dt>
<dd><p>Indirect 64-bit load.
</p></dd>
<dt><code>ldindw %s, imm32</code></dt>
<dd><p>Indirect 32-bit load.
</p></dd>
<dt><code>ldindh %s, imm32</code></dt>
<dd><p>Indirect 16-bit load.
</p></dd>
<dt><code>ldindb %s, imm32</code></dt>
<dd><p>Indirect 8-bit load.
</p></dd>
</dl>

<a name="Generic-load_002fstore-instructions"></a>
<h4 class="subsubsection">9.7.4.6 Generic load/store instructions</h4>

<p>General-purpose load and store instructions are provided for several
word sizes.
</p>
<p>Load to register instructions:
</p>
<dl compact="compact">
<dt><code>ldxdw %d, [%s+offset16]</code></dt>
<dd><p>Generic 64-bit load.
</p></dd>
<dt><code>ldxw %d, [%s+offset16]</code></dt>
<dd><p>Generic 32-bit load.
</p></dd>
<dt><code>ldxh %d, [%s+offset16]</code></dt>
<dd><p>Generic 16-bit load.
</p></dd>
<dt><code>ldxb %d, [%s+offset16]</code></dt>
<dd><p>Generic 8-bit load.
</p></dd>
</dl>

<p>Store from register instructions:
</p>
<dl compact="compact">
<dt><code>stxdw [%d+offset16], %s</code></dt>
<dd><p>Generic 64-bit store.
</p></dd>
<dt><code>stxw [%d+offset16], %s</code></dt>
<dd><p>Generic 32-bit store.
</p></dd>
<dt><code>stxh [%d+offset16], %s</code></dt>
<dd><p>Generic 16-bit store.
</p></dd>
<dt><code>stxb [%d+offset16], %s</code></dt>
<dd><p>Generic 8-bit store.
</p></dd>
</dl>

<p>Store from immediates instructions:
</p>
<dl compact="compact">
<dt><code>stddw [%d+offset16], imm32</code></dt>
<dd><p>Store immediate as 64-bit.
</p></dd>
<dt><code>stdw [%d+offset16], imm32</code></dt>
<dd><p>Store immediate as 32-bit.
</p></dd>
<dt><code>stdh [%d+offset16], imm32</code></dt>
<dd><p>Store immediate as 16-bit.
</p></dd>
<dt><code>stdb [%d+offset16], imm32</code></dt>
<dd><p>Store immediate as 8-bit.
</p></dd>
</dl>

<a name="Jump-instructions"></a>
<h4 class="subsubsection">9.7.4.7 Jump instructions</h4>

<p>eBPF provides the following compare-and-jump instructions, which
compare the values of the two given registers, or the values of a
register and an immediate, and perform a branch in case the comparison
holds true.
</p>
<dl compact="compact">
<dt><code>ja %d,(%s|imm32),disp16</code></dt>
<dd><p>Jump-always.
</p></dd>
<dt><code>jeq %d,(%s|imm32),disp16</code></dt>
<dd><p>Jump if equal.
</p></dd>
<dt><code>jgt %d,(%s|imm32),disp16</code></dt>
<dd><p>Jump if greater.
</p></dd>
<dt><code>jge %d,(%s|imm32),disp16</code></dt>
<dd><p>Jump if greater or equal.
</p></dd>
<dt><code>jlt %d,(%s|imm32),disp16</code></dt>
<dd><p>Jump if lesser.
</p></dd>
<dt><code>jle %d,(%s|imm32),disp16</code></dt>
<dd><p>Jump if lesser or equal.
</p></dd>
<dt><code>jset %d,(%s|imm32),disp16</code></dt>
<dd><p>Jump if signed equal.
</p></dd>
<dt><code>jne %d,(%s|imm32),disp16</code></dt>
<dd><p>Jump if not equal.
</p></dd>
<dt><code>jsgt %d,(%s|imm32),disp16</code></dt>
<dd><p>Jump if signed greater.
</p></dd>
<dt><code>jsge %d,(%s|imm32),disp16</code></dt>
<dd><p>Jump if signed greater or equal.
</p></dd>
<dt><code>jslt %d,(%s|imm32),disp16</code></dt>
<dd><p>Jump if signed lesser.
</p></dd>
<dt><code>jsle %d,(%s|imm32),disp16</code></dt>
<dd><p>Jump if signed lesser or equal.
</p></dd>
</dl>

<p>A call instruction is provided in order to perform calls to other eBPF
functions, or to external kernel helpers:
</p>
<dl compact="compact">
<dt><code>call (disp32|imm32)</code></dt>
<dd><p>Jump and link to the offset <em>disp32</em>, or to the kernel helper
function identified by <em>imm32</em>.
</p></dd>
</dl>

<p>Finally:
</p>
<dl compact="compact">
<dt><code>exit</code></dt>
<dd><p>Terminate the eBPF program.
</p></dd>
</dl>

<a name="Atomic-instructions"></a>
<h4 class="subsubsection">9.7.4.8 Atomic instructions</h4>

<p>Atomic exchange-and-add instructions are provided in two flavors: one
for swapping 64-bit quantities and another for 32-bit quantities.
</p>
<dl compact="compact">
<dt><code>xadddw [%d+offset16],%s</code></dt>
<dd><p>Exchange-and-add a 64-bit value at the specified location.
</p></dd>
<dt><code>xaddw [%d+offset16],%s</code></dt>
<dd><p>Exchange-and-add a 32-bit value at the specified location.
</p></dd>
</dl>


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