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  61. <a name="RL78-Options"></a>
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  64. Next: <a href="RS_002f6000-and-PowerPC-Options.html#RS_002f6000-and-PowerPC-Options" accesskey="n" rel="next">RS/6000 and PowerPC Options</a>, Previous: <a href="RISC_002dV-Options.html#RISC_002dV-Options" accesskey="p" rel="prev">RISC-V Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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  67. <a name="RL78-Options-1"></a>
  68. <h4 class="subsection">3.19.43 RL78 Options</h4>
  69. <a name="index-RL78-Options"></a>
  70. <dl compact="compact">
  71. <dt><code>-msim</code></dt>
  72. <dd><a name="index-msim-7"></a>
  73. <p>Links in additional target libraries to support operation within a
  74. simulator.
  75. </p>
  76. </dd>
  77. <dt><code>-mmul=none</code></dt>
  78. <dt><code>-mmul=g10</code></dt>
  79. <dt><code>-mmul=g13</code></dt>
  80. <dt><code>-mmul=g14</code></dt>
  81. <dt><code>-mmul=rl78</code></dt>
  82. <dd><a name="index-mmul"></a>
  83. <p>Specifies the type of hardware multiplication and division support to
  84. be used. The simplest is <code>none</code>, which uses software for both
  85. multiplication and division. This is the default. The <code>g13</code>
  86. value is for the hardware multiply/divide peripheral found on the
  87. RL78/G13 (S2 core) targets. The <code>g14</code> value selects the use of
  88. the multiplication and division instructions supported by the RL78/G14
  89. (S3 core) parts. The value <code>rl78</code> is an alias for <code>g14</code> and
  90. the value <code>mg10</code> is an alias for <code>none</code>.
  91. </p>
  92. <p>In addition a C preprocessor macro is defined, based upon the setting
  93. of this option. Possible values are: <code>__RL78_MUL_NONE__</code>,
  94. <code>__RL78_MUL_G13__</code> or <code>__RL78_MUL_G14__</code>.
  95. </p>
  96. </dd>
  97. <dt><code>-mcpu=g10</code></dt>
  98. <dt><code>-mcpu=g13</code></dt>
  99. <dt><code>-mcpu=g14</code></dt>
  100. <dt><code>-mcpu=rl78</code></dt>
  101. <dd><a name="index-mcpu-8"></a>
  102. <p>Specifies the RL78 core to target. The default is the G14 core, also
  103. known as an S3 core or just RL78. The G13 or S2 core does not have
  104. multiply or divide instructions, instead it uses a hardware peripheral
  105. for these operations. The G10 or S1 core does not have register
  106. banks, so it uses a different calling convention.
  107. </p>
  108. <p>If this option is set it also selects the type of hardware multiply
  109. support to use, unless this is overridden by an explicit
  110. <samp>-mmul=none</samp> option on the command line. Thus specifying
  111. <samp>-mcpu=g13</samp> enables the use of the G13 hardware multiply
  112. peripheral and specifying <samp>-mcpu=g10</samp> disables the use of
  113. hardware multiplications altogether.
  114. </p>
  115. <p>Note, although the RL78/G14 core is the default target, specifying
  116. <samp>-mcpu=g14</samp> or <samp>-mcpu=rl78</samp> on the command line does
  117. change the behavior of the toolchain since it also enables G14
  118. hardware multiply support. If these options are not specified on the
  119. command line then software multiplication routines will be used even
  120. though the code targets the RL78 core. This is for backwards
  121. compatibility with older toolchains which did not have hardware
  122. multiply and divide support.
  123. </p>
  124. <p>In addition a C preprocessor macro is defined, based upon the setting
  125. of this option. Possible values are: <code>__RL78_G10__</code>,
  126. <code>__RL78_G13__</code> or <code>__RL78_G14__</code>.
  127. </p>
  128. </dd>
  129. <dt><code>-mg10</code></dt>
  130. <dt><code>-mg13</code></dt>
  131. <dt><code>-mg14</code></dt>
  132. <dt><code>-mrl78</code></dt>
  133. <dd><a name="index-mg10"></a>
  134. <a name="index-mg13"></a>
  135. <a name="index-mg14"></a>
  136. <a name="index-mrl78"></a>
  137. <p>These are aliases for the corresponding <samp>-mcpu=</samp> option. They
  138. are provided for backwards compatibility.
  139. </p>
  140. </dd>
  141. <dt><code>-mallregs</code></dt>
  142. <dd><a name="index-mallregs"></a>
  143. <p>Allow the compiler to use all of the available registers. By default
  144. registers <code>r24..r31</code> are reserved for use in interrupt handlers.
  145. With this option enabled these registers can be used in ordinary
  146. functions as well.
  147. </p>
  148. </dd>
  149. <dt><code>-m64bit-doubles</code></dt>
  150. <dt><code>-m32bit-doubles</code></dt>
  151. <dd><a name="index-m64bit_002ddoubles"></a>
  152. <a name="index-m32bit_002ddoubles"></a>
  153. <p>Make the <code>double</code> data type be 64 bits (<samp>-m64bit-doubles</samp>)
  154. or 32 bits (<samp>-m32bit-doubles</samp>) in size. The default is
  155. <samp>-m32bit-doubles</samp>.
  156. </p>
  157. </dd>
  158. <dt><code>-msave-mduc-in-interrupts</code></dt>
  159. <dt><code>-mno-save-mduc-in-interrupts</code></dt>
  160. <dd><a name="index-msave_002dmduc_002din_002dinterrupts"></a>
  161. <a name="index-mno_002dsave_002dmduc_002din_002dinterrupts"></a>
  162. <p>Specifies that interrupt handler functions should preserve the
  163. MDUC registers. This is only necessary if normal code might use
  164. the MDUC registers, for example because it performs multiplication
  165. and division operations. The default is to ignore the MDUC registers
  166. as this makes the interrupt handlers faster. The target option -mg13
  167. needs to be passed for this to work as this feature is only available
  168. on the G13 target (S2 core). The MDUC registers will only be saved
  169. if the interrupt handler performs a multiplication or division
  170. operation or it calls another function.
  171. </p>
  172. </dd>
  173. </dl>
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