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//Adapted to PT8211, Frank Bösing, Ben-Rheinland |
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//Adapted to PT8211, Frank Bösing, Ben-Rheinland |
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#if !defined(__IMXRT1052__) && !defined(__IMXRT1062__) |
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#include <Arduino.h> |
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#include <Arduino.h> |
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#include "output_pt8211.h" |
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#include "output_pt8211.h" |
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#include "memcpy_audio.h" |
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#include "memcpy_audio.h" |
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#include "utility/imxrt_hw.h" |
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audio_block_t * AudioOutputPT8211::block_left_1st = NULL; |
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audio_block_t * AudioOutputPT8211::block_left_1st = NULL; |
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audio_block_t * AudioOutputPT8211::block_right_1st = NULL; |
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audio_block_t * AudioOutputPT8211::block_right_1st = NULL; |
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uint16_t AudioOutputPT8211::block_right_offset = 0; |
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uint16_t AudioOutputPT8211::block_right_offset = 0; |
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bool AudioOutputPT8211::update_responsibility = false; |
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bool AudioOutputPT8211::update_responsibility = false; |
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#if defined(AUDIO_PT8211_OVERSAMPLING) |
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#if defined(AUDIO_PT8211_OVERSAMPLING) |
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DMAMEM static uint32_t i2s_tx_buffer[AUDIO_BLOCK_SAMPLES*4]; |
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static uint32_t i2s_tx_buffer[AUDIO_BLOCK_SAMPLES*4]; |
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#else |
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#else |
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DMAMEM static uint32_t i2s_tx_buffer[AUDIO_BLOCK_SAMPLES]; |
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static uint32_t i2s_tx_buffer[AUDIO_BLOCK_SAMPLES]; |
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#endif |
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#endif |
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DMAChannel AudioOutputPT8211::dma(false); |
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DMAChannel AudioOutputPT8211::dma(false); |
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// TODO: should we set & clear the I2S_TCSR_SR bit here? |
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// TODO: should we set & clear the I2S_TCSR_SR bit here? |
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config_i2s(); |
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config_i2s(); |
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#if defined(KINETISK) |
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CORE_PIN22_CONFIG = PORT_PCR_MUX(6); // pin 22, PTC1, I2S0_TXD0 |
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CORE_PIN22_CONFIG = PORT_PCR_MUX(6); // pin 22, PTC1, I2S0_TXD0 |
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#if defined(KINETISK) |
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dma.TCD->SADDR = i2s_tx_buffer; |
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dma.TCD->SADDR = i2s_tx_buffer; |
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dma.TCD->SOFF = 2; |
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dma.TCD->SOFF = 2; |
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dma.TCD->ATTR = DMA_TCD_ATTR_SSIZE(1) | DMA_TCD_ATTR_DSIZE(1); |
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dma.TCD->ATTR = DMA_TCD_ATTR_SSIZE(1) | DMA_TCD_ATTR_DSIZE(1); |
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dma.TCD->DLASTSGA = 0; |
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dma.TCD->DLASTSGA = 0; |
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dma.TCD->BITER_ELINKNO = sizeof(i2s_tx_buffer) / 2; |
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dma.TCD->BITER_ELINKNO = sizeof(i2s_tx_buffer) / 2; |
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dma.TCD->CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR; |
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dma.TCD->CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR; |
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#endif |
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dma.triggerAtHardwareEvent(DMAMUX_SOURCE_I2S0_TX); |
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update_responsibility = update_setup(); |
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dma.enable(); |
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dma.triggerAtHardwareEvent(DMAMUX_SOURCE_I2S0_TX); |
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I2S0_TCSR |= I2S_TCSR_TE | I2S_TCSR_BCE | I2S_TCSR_FRDE | I2S_TCSR_FR; |
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I2S0_TCSR |= I2S_TCSR_TE | I2S_TCSR_BCE | I2S_TCSR_FRDE | I2S_TCSR_FR; |
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#elif defined(__IMXRT1052__) || defined(__IMXRT1062__) |
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CORE_PIN6_CONFIG = 3; //1:TX_DATA0 |
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dma.TCD->SADDR = i2s_tx_buffer; |
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dma.TCD->SOFF = 2; |
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dma.TCD->ATTR = DMA_TCD_ATTR_SSIZE(1) | DMA_TCD_ATTR_DSIZE(1); |
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dma.TCD->NBYTES_MLNO = 2; |
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dma.TCD->SLAST = -sizeof(i2s_tx_buffer); |
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dma.TCD->DOFF = 0; |
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dma.TCD->CITER_ELINKNO = sizeof(i2s_tx_buffer) / 2; |
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dma.TCD->DLASTSGA = 0; |
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dma.TCD->BITER_ELINKNO = sizeof(i2s_tx_buffer) / 2; |
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dma.TCD->CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR; |
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dma.TCD->DADDR = (void *)((uint32_t)&I2S1_TDR0); |
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dma.triggerAtHardwareEvent(DMAMUX_SOURCE_SAI1_TX); |
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I2S1_RCSR |= I2S_RCSR_RE; |
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I2S1_TCSR |= I2S_TCSR_TE | I2S_TCSR_BCE | I2S_TCSR_FRDE; |
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#endif |
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update_responsibility = update_setup(); |
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dma.attachInterrupt(isr); |
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dma.attachInterrupt(isr); |
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dma.enable(); |
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} |
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} |
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void AudioOutputPT8211::isr(void) |
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void AudioOutputPT8211::isr(void) |
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blockR = AudioOutputPT8211::block_right_1st; |
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blockR = AudioOutputPT8211::block_right_1st; |
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offsetL = AudioOutputPT8211::block_left_offset; |
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offsetL = AudioOutputPT8211::block_left_offset; |
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offsetR = AudioOutputPT8211::block_right_offset; |
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offsetR = AudioOutputPT8211::block_right_offset; |
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#if defined(AUDIO_PT8211_OVERSAMPLING) |
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#if defined(AUDIO_PT8211_OVERSAMPLING) |
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static int32_t oldL = 0; |
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static int32_t oldL = 0; |
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static int32_t oldR = 0; |
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static int32_t oldR = 0; |
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for (int i=0; i< AUDIO_BLOCK_SAMPLES / 2; i++, offsetL++, offsetR++) { |
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for (int i=0; i< AUDIO_BLOCK_SAMPLES / 2; i++, offsetL++, offsetR++) { |
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int32_t valL = blockL->data[offsetL]; |
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int32_t valL = blockL->data[offsetL]; |
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int32_t valR = blockR->data[offsetR]; |
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int32_t valR = blockR->data[offsetR]; |
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int32_t combL[3] = {0}; |
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int32_t combL[3] = {0}; |
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static int32_t combLOld[2] = {0}; |
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static int32_t combLOld[2] = {0}; |
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int32_t combR[3] = {0}; |
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int32_t combR[3] = {0}; |
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static int32_t combROld[2] = {0}; |
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static int32_t combROld[2] = {0}; |
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combL[0] = valL - oldL; |
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combL[0] = valL - oldL; |
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combR[0] = valR - oldR; |
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combR[0] = valR - oldR; |
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combL[1] = combL[0] - combLOld[0]; |
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combL[1] = combL[0] - combLOld[0]; |
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offsetL += AUDIO_BLOCK_SAMPLES / 2; |
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offsetL += AUDIO_BLOCK_SAMPLES / 2; |
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offsetR += AUDIO_BLOCK_SAMPLES / 2; |
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offsetR += AUDIO_BLOCK_SAMPLES / 2; |
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#endif //defined(AUDIO_PT8211_OVERSAMPLING) |
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#endif //defined(AUDIO_PT8211_OVERSAMPLING) |
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} else if (blockL) { |
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} else if (blockL) { |
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#if defined(AUDIO_PT8211_OVERSAMPLING) |
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#if defined(AUDIO_PT8211_OVERSAMPLING) |
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#if defined(AUDIO_PT8211_INTERPOLATION_LINEAR) |
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#if defined(AUDIO_PT8211_INTERPOLATION_LINEAR) |
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int32_t combL[3] = {0}; |
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int32_t combL[3] = {0}; |
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static int32_t combLOld[2] = {0}; |
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static int32_t combLOld[2] = {0}; |
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combL[0] = valL - oldL; |
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combL[0] = valL - oldL; |
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combL[1] = combL[0] - combLOld[0]; |
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combL[1] = combL[0] - combLOld[0]; |
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combL[2] = combL[1] - combLOld[1]; |
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combL[2] = combL[1] - combLOld[1]; |
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// combL[2] now holds input val |
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// combL[2] now holds input val |
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combLOld[0] = combL[0]; |
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combLOld[0] = combL[0]; |
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combLOld[1] = combL[1]; |
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combLOld[1] = combL[1]; |
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for (int j = 0; j < 4; j++) { |
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for (int j = 0; j < 4; j++) { |
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int32_t integrateL[3]; |
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int32_t integrateL[3]; |
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static int32_t integrateLOld[3] = {0}; |
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static int32_t integrateLOld[3] = {0}; |
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integrateLOld[1] = integrateL[1]; |
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integrateLOld[1] = integrateL[1]; |
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integrateLOld[2] = integrateL[2]; |
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integrateLOld[2] = integrateL[2]; |
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} |
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} |
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// fill right channel with zeros: |
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// fill right channel with zeros: |
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*(dest+1) = 0; |
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*(dest+1) = 0; |
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*(dest+3) = 0; |
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*(dest+3) = 0; |
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#else |
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#else |
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#error no interpolation method defined for oversampling. |
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#error no interpolation method defined for oversampling. |
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#endif //defined(AUDIO_PT8211_INTERPOLATION_LINEAR) |
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#endif //defined(AUDIO_PT8211_INTERPOLATION_LINEAR) |
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#else |
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#else |
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memcpy_tointerleaveL(dest, blockL->data + offsetL); |
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memcpy_tointerleaveL(dest, blockL->data + offsetL); |
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offsetL += (AUDIO_BLOCK_SAMPLES / 2); |
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offsetL += (AUDIO_BLOCK_SAMPLES / 2); |
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#endif //defined(AUDIO_PT8211_OVERSAMPLING) |
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#endif //defined(AUDIO_PT8211_OVERSAMPLING) |
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int32_t combR[3] = {0}; |
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int32_t combR[3] = {0}; |
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static int32_t combROld[2] = {0}; |
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static int32_t combROld[2] = {0}; |
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combR[0] = valR - oldR; |
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combR[0] = valR - oldR; |
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combR[1] = combR[0] - combROld[0]; |
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combR[1] = combR[0] - combROld[0]; |
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combR[2] = combR[1] - combROld[1]; |
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combR[2] = combR[1] - combROld[1]; |
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// combR[2] now holds input val |
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// combR[2] now holds input val |
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combROld[0] = combR[0]; |
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combROld[0] = combR[0]; |
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combROld[1] = combR[1]; |
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combROld[1] = combR[1]; |
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for (int j = 0; j < 4; j++) { |
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for (int j = 0; j < 4; j++) { |
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int32_t integrateR[3]; |
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int32_t integrateR[3]; |
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static int32_t integrateROld[3] = {0}; |
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static int32_t integrateROld[3] = {0}; |
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integrateROld[1] = integrateR[1]; |
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integrateROld[1] = integrateR[1]; |
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integrateROld[2] = integrateR[2]; |
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integrateROld[2] = integrateR[2]; |
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} |
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} |
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// fill left channel with zeros: |
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// fill left channel with zeros: |
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*(dest+0) = 0; |
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*(dest+0) = 0; |
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*(dest+2) = 0; |
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*(dest+2) = 0; |
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#if defined(AUDIO_PT8211_OVERSAMPLING) |
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#if defined(AUDIO_PT8211_OVERSAMPLING) |
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memset(dest,0,AUDIO_BLOCK_SAMPLES*8); |
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memset(dest,0,AUDIO_BLOCK_SAMPLES*8); |
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#else |
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#else |
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memset(dest,0,AUDIO_BLOCK_SAMPLES*2); |
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memset(dest,0,AUDIO_BLOCK_SAMPLES*2); |
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#endif |
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#endif |
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return; |
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return; |
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} |
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} |
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} |
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} |
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} |
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} |
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#if defined(KINETISK) |
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// MCLK needs to be 48e6 / 1088 * 256 = 11.29411765 MHz -> 44.117647 kHz sample rate |
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// MCLK needs to be 48e6 / 1088 * 256 = 11.29411765 MHz -> 44.117647 kHz sample rate |
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// |
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// |
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#if F_CPU == 96000000 || F_CPU == 48000000 || F_CPU == 24000000 |
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#if F_CPU == 96000000 || F_CPU == 48000000 || F_CPU == 24000000 |
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#define MCLK_SRC 0 // system clock |
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#define MCLK_SRC 0 // system clock |
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#endif |
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#endif |
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#endif |
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#endif |
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#endif |
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void AudioOutputPT8211::config_i2s(void) |
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void AudioOutputPT8211::config_i2s(void) |
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{ |
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{ |
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#if defined(KINETISK) |
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SIM_SCGC6 |= SIM_SCGC6_I2S; |
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SIM_SCGC6 |= SIM_SCGC6_I2S; |
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SIM_SCGC7 |= SIM_SCGC7_DMA; |
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SIM_SCGC7 |= SIM_SCGC7_DMA; |
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SIM_SCGC6 |= SIM_SCGC6_DMAMUX; |
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SIM_SCGC6 |= SIM_SCGC6_DMAMUX; |
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// configure pin mux for 3 clock signals |
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// configure pin mux for 3 clock signals |
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CORE_PIN23_CONFIG = PORT_PCR_MUX(6); // pin 23, PTC2, I2S0_TX_FS (LRCLK) |
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CORE_PIN23_CONFIG = PORT_PCR_MUX(6); // pin 23, PTC2, I2S0_TX_FS (LRCLK) |
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CORE_PIN9_CONFIG = PORT_PCR_MUX(6); // pin 9, PTC3, I2S0_TX_BCLK |
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CORE_PIN9_CONFIG = PORT_PCR_MUX(6); // pin 9, PTC3, I2S0_TX_BCLK |
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#if 0 |
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CORE_PIN11_CONFIG = PORT_PCR_MUX(6); // pin 11, PTC6, I2S0_MCLK |
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//CORE_PIN11_CONFIG = PORT_PCR_MUX(6); // pin 11, PTC6, I2S0_MCLK |
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#elif ( defined(__IMXRT1052__) || defined(__IMXRT1062__) ) |
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CCM_CCGR5 |= CCM_CCGR5_SAI1(CCM_CCGR_ON); |
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//PLL: |
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int fs = AUDIO_SAMPLE_RATE_EXACT; |
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// PLL between 27*24 = 648MHz und 54*24=1296MHz |
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int n1 = 4; //SAI prescaler 4 => (n1*n2) = multiple of 4 |
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int n2 = 1 + (24000000 * 27) / (fs * 256 * n1); |
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double C = ((double)fs * 256 * n1 * n2) / 24000000; |
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int c0 = C; |
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int c2 = 10000; |
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int c1 = C * c2 - (c0 * c2); |
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set_audioClock(c0, c1, c2); |
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// clear SAI1_CLK register locations |
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CCM_CSCMR1 = (CCM_CSCMR1 & ~(CCM_CSCMR1_SAI1_CLK_SEL_MASK)) |
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| CCM_CSCMR1_SAI1_CLK_SEL(2); // &0x03 // (0,1,2): PLL3PFD0, PLL5, PLL4 |
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CCM_CS1CDR = (CCM_CS1CDR & ~(CCM_CS1CDR_SAI1_CLK_PRED_MASK | CCM_CS1CDR_SAI1_CLK_PODF_MASK)) |
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| CCM_CS1CDR_SAI1_CLK_PRED(n1-1) // &0x07 |
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| CCM_CS1CDR_SAI1_CLK_PODF(n2-1); // &0x3f |
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IOMUXC_GPR_GPR1 = (IOMUXC_GPR_GPR1 & ~(IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_MASK)) |
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| (IOMUXC_GPR_GPR1_SAI1_MCLK_DIR | IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL(0)); //Select MCLK |
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if (I2S1_TCSR & I2S_TCSR_TE) return; |
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// CORE_PIN23_CONFIG = 3; //1:MCLK |
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CORE_PIN21_CONFIG = 3; //1:RX_BCLK |
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CORE_PIN20_CONFIG = 3; //1:RX_SYNC |
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// CORE_PIN6_CONFIG = 3; //1:TX_DATA0 |
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// CORE_PIN7_CONFIG = 3; //1:RX_DATA0 |
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int rsync = 0; |
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int tsync = 1; |
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#if defined(AUDIO_PT8211_OVERSAMPLING) |
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int div = 0; |
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#else |
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int div = 3; |
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#endif |
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// configure transmitter |
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I2S1_TMR = 0; |
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I2S1_TCR1 = I2S_TCR1_RFW(0); |
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I2S1_TCR2 = I2S_TCR2_SYNC(tsync) | I2S_TCR2_BCP | I2S_TCR2_MSEL(1) | I2S_TCR2_BCD | I2S_TCR2_DIV(div); |
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I2S1_TCR3 = I2S_TCR3_TCE; |
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// I2S1_TCR4 = I2S_TCR4_FRSZ(1) | I2S_TCR4_SYWD(15) | I2S_TCR4_MF | I2S_TCR4_FSE | I2S_TCR4_FSP | I2S_TCR4_FSD; //TDA1543 |
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I2S1_TCR4 = I2S_TCR4_FRSZ(1) | I2S_TCR4_SYWD(15) | I2S_TCR4_MF /*| I2S_TCR4_FSE*/ | I2S_TCR4_FSP | I2S_TCR4_FSD; //PT8211 |
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I2S1_TCR5 = I2S_TCR5_WNW(15) | I2S_TCR5_W0W(15) | I2S_TCR5_FBT(15); |
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I2S1_RMR = 0; |
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//I2S1_RCSR = (1<<25); //Reset |
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I2S1_RCR1 = I2S_RCR1_RFW(0); |
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I2S1_RCR2 = I2S_RCR2_SYNC(rsync) | I2S_RCR2_BCP | I2S_RCR2_MSEL(1) | I2S_TCR2_BCD | I2S_TCR2_DIV(div); |
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I2S1_RCR3 = I2S_RCR3_RCE; |
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// I2S1_TCR4 = I2S_TCR4_FRSZ(1) | I2S_TCR4_SYWD(15) | I2S_TCR4_MF | I2S_TCR4_FSE | I2S_TCR4_FSP | I2S_TCR4_FSD; //TDA1543 |
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I2S1_RCR4 = I2S_RCR4_FRSZ(1) | I2S_RCR4_SYWD(15) | I2S_RCR4_MF /*| I2S_RCR4_FSE*/ | I2S_RCR4_FSP | I2S_RCR4_FSD; //PT8211 |
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I2S1_RCR5 = I2S_RCR5_WNW(15) | I2S_RCR5_W0W(15) | I2S_RCR5_FBT(15); |
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#endif |
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#endif |
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} |
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} |
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#endif |
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