SCB_SHPR3 = 0x20000000;  // Systick = priority 32

default 128 priority for all interrupts

SPDIF register bit defs

Tempmon registers - bit definitions

Reset Control Bit Definitions

- comment SRC_GPR1..SRC_GPR10 (used by the ROM code)

Update imxrt.h

Deleted a duplicate define: #define CCM_CBCMR_PERIPH_CLK2_SEL_MASK		((uint32_t)(0x03 << 12))
 and added tempmon registers

fixes #288

Fix typo

F_CPU 256 MHz

This reverts commit 5dade02144.