SPI Transfer(buf, cnt) use FIFO 16 bit

Experiment with making the whole transfer of the buffer act like it is
to logically hold the CS pins for that whole transfer.  This removes
gaps between each 16 bit transfer.

Update SPI.transfer(buf, cnt) to use the FIFO queue to speed things up.
It also speeds things up to pack the data into 16 bit transfers instead
of 8 bits.

As this code is more complicated,  no longer makes sense to inline it,
so functions moved from .h to .cpp files.

SPI1 and SPI2 transfer functions were updated as well for T3.5 and T3.6

Pin 45 is valid CS for SPI0 on new boards

USE SDCard pins for SPI1

This adds support for optionally being able to use the SDCard pins for
SPI1.

This change requires the corresponding changes in the CORES project

Add extern for SPI2 for T3.6

Beta boards changed names

SPI2 Support

Added SPI2 support for T34/T35 boards

Oops - missed debug message

Commented out other debug messages earlier, but missed this one

A serial debug line should be commented.

Added SPI1 object for Teensy 3.5 test board

These changes plus some changes in core (added register defines, plus
added logical SPCR1 register), allowed me to do quick hack to
serialFlash library and test and initialize flash memory using 3.5 test
board connected to prop shield using pins 0, 1, 20 and 6

Update SPI.h

In the comments: "Teensy 3.x" changed to "Teensy LC". Or is the LC also part of the "3" family?

http://forum.pjrc.com/threads/26776-Teensyduino-1-20-Released?p=56316&viewfull=1#post56316