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  1. <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">

  2. <html>

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  16. <head>

  17. <meta http-equiv="Content-Type" content="text/html; charset=utf-8">

  18. <title>PowerPC Features (Debugging with GDB)</title>

  19. 

  20. <meta name="description" content="PowerPC Features (Debugging with GDB)">

  21. <meta name="keywords" content="PowerPC Features (Debugging with GDB)">

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  27. <link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">

  28. <link href="Standard-Target-Features.html#Standard-Target-Features" rel="up" title="Standard Target Features">

  29. <link href="RISC_002dV-Features.html#RISC_002dV-Features" rel="next" title="RISC-V Features">

  30. <link href="OpenRISC-1000-Features.html#OpenRISC-1000-Features" rel="prev" title="OpenRISC 1000 Features">

  31. <style type="text/css">

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  58. 

  59. 

  60. </head>

  61. 

  62. <body lang="en">

  63. <a name="PowerPC-Features"></a>

  64. <div class="header">

  65. <p>

  66. Next: <a href="RISC_002dV-Features.html#RISC_002dV-Features" accesskey="n" rel="next">RISC-V Features</a>, Previous: <a href="OpenRISC-1000-Features.html#OpenRISC-1000-Features" accesskey="p" rel="prev">OpenRISC 1000 Features</a>, Up: <a href="Standard-Target-Features.html#Standard-Target-Features" accesskey="u" rel="up">Standard Target Features</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Concept-Index.html#Concept-Index" title="Index" rel="index">Index</a>]</p>

  67. </div>

  68. <hr>

  69. <a name="PowerPC-Features-1"></a>

  70. <h4 class="subsection">G.5.11 PowerPC Features</h4>

  71. <a name="index-target-descriptions_002c-PowerPC-features"></a>

  72. 

  73. <p>The &lsquo;<samp>org.gnu.gdb.power.core</samp>&rsquo; feature is required for PowerPC

  74. targets.  It should contain registers &lsquo;<samp>r0</samp>&rsquo; through &lsquo;<samp>r31</samp>&rsquo;,

  75. &lsquo;<samp>pc</samp>&rsquo;, &lsquo;<samp>msr</samp>&rsquo;, &lsquo;<samp>cr</samp>&rsquo;, &lsquo;<samp>lr</samp>&rsquo;, &lsquo;<samp>ctr</samp>&rsquo;, and

  76. &lsquo;<samp>xer</samp>&rsquo;.  They may be 32-bit or 64-bit depending on the target.

  77. </p>

  78. <p>The &lsquo;<samp>org.gnu.gdb.power.fpu</samp>&rsquo; feature is optional.  It should

  79. contain registers &lsquo;<samp>f0</samp>&rsquo; through &lsquo;<samp>f31</samp>&rsquo; and &lsquo;<samp>fpscr</samp>&rsquo;.

  80. </p>

  81. <p>The &lsquo;<samp>org.gnu.gdb.power.altivec</samp>&rsquo; feature is optional.  It should

  82. contain registers &lsquo;<samp>vr0</samp>&rsquo; through &lsquo;<samp>vr31</samp>&rsquo;, &lsquo;<samp>vscr</samp>&rsquo;, and

  83. &lsquo;<samp>vrsave</samp>&rsquo;.  <small>GDB</small> will define pseudo-registers &lsquo;<samp>v0</samp>&rsquo;

  84. through &lsquo;<samp>v31</samp>&rsquo; as aliases for the corresponding &lsquo;<samp>vrX</samp>&rsquo;

  85. registers.

  86. </p>

  87. <p>The &lsquo;<samp>org.gnu.gdb.power.vsx</samp>&rsquo; feature is optional.  It should

  88. contain registers &lsquo;<samp>vs0h</samp>&rsquo; through &lsquo;<samp>vs31h</samp>&rsquo;.  <small>GDB</small> will

  89. combine these registers with the floating point registers (&lsquo;<samp>f0</samp>&rsquo;

  90. through &lsquo;<samp>f31</samp>&rsquo;) and the altivec registers (&lsquo;<samp>vr0</samp>&rsquo; through

  91. &lsquo;<samp>vr31</samp>&rsquo;) to present the 128-bit wide registers &lsquo;<samp>vs0</samp>&rsquo; through

  92. &lsquo;<samp>vs63</samp>&rsquo;, the set of vector-scalar registers for POWER7.

  93. Therefore, this feature requires both &lsquo;<samp>org.gnu.gdb.power.fpu</samp>&rsquo; and

  94. &lsquo;<samp>org.gnu.gdb.power.altivec</samp>&rsquo;.

  95. </p>

  96. <p>The &lsquo;<samp>org.gnu.gdb.power.spe</samp>&rsquo; feature is optional.  It should

  97. contain registers &lsquo;<samp>ev0h</samp>&rsquo; through &lsquo;<samp>ev31h</samp>&rsquo;, &lsquo;<samp>acc</samp>&rsquo;, and

  98. &lsquo;<samp>spefscr</samp>&rsquo;.  SPE targets should provide 32-bit registers in

  99. &lsquo;<samp>org.gnu.gdb.power.core</samp>&rsquo; and provide the upper halves in

  100. &lsquo;<samp>ev0h</samp>&rsquo; through &lsquo;<samp>ev31h</samp>&rsquo;.  <small>GDB</small> will combine

  101. these to present registers &lsquo;<samp>ev0</samp>&rsquo; through &lsquo;<samp>ev31</samp>&rsquo; to the

  102. user.

  103. </p>

  104. <p>The &lsquo;<samp>org.gnu.gdb.power.ppr</samp>&rsquo; feature is optional.  It should

  105. contain the 64-bit register &lsquo;<samp>ppr</samp>&rsquo;.

  106. </p>

  107. <p>The &lsquo;<samp>org.gnu.gdb.power.dscr</samp>&rsquo; feature is optional.  It should

  108. contain the 64-bit register &lsquo;<samp>dscr</samp>&rsquo;.

  109. </p>

  110. <p>The &lsquo;<samp>org.gnu.gdb.power.tar</samp>&rsquo; feature is optional.  It should

  111. contain the 64-bit register &lsquo;<samp>tar</samp>&rsquo;.

  112. </p>

  113. <p>The &lsquo;<samp>org.gnu.gdb.power.ebb</samp>&rsquo; feature is optional.  It should

  114. contain registers &lsquo;<samp>bescr</samp>&rsquo;, &lsquo;<samp>ebbhr</samp>&rsquo; and &lsquo;<samp>ebbrr</samp>&rsquo;, all

  115. 64-bit wide.

  116. </p>

  117. <p>The &lsquo;<samp>org.gnu.gdb.power.linux.pmu</samp>&rsquo; feature is optional.  It should

  118. contain registers &lsquo;<samp>mmcr0</samp>&rsquo;, &lsquo;<samp>mmcr2</samp>&rsquo;, &lsquo;<samp>siar</samp>&rsquo;, &lsquo;<samp>sdar</samp>&rsquo;

  119. and &lsquo;<samp>sier</samp>&rsquo;, all 64-bit wide.  This is the subset of the isa 2.07

  120. server PMU registers provided by <small>GNU</small>/Linux.

  121. </p>

  122. <p>The &lsquo;<samp>org.gnu.gdb.power.htm.spr</samp>&rsquo; feature is optional.  It should

  123. contain registers &lsquo;<samp>tfhar</samp>&rsquo;, &lsquo;<samp>texasr</samp>&rsquo; and &lsquo;<samp>tfiar</samp>&rsquo;, all

  124. 64-bit wide.

  125. </p>

  126. <p>The &lsquo;<samp>org.gnu.gdb.power.htm.core</samp>&rsquo; feature is optional.  It should

  127. contain the checkpointed general-purpose registers &lsquo;<samp>cr0</samp>&rsquo; through

  128. &lsquo;<samp>cr31</samp>&rsquo;, as well as the checkpointed registers &lsquo;<samp>clr</samp>&rsquo; and

  129. &lsquo;<samp>cctr</samp>&rsquo;.  These registers may all be either 32-bit or 64-bit

  130. depending on the target.  It should also contain the checkpointed

  131. registers &lsquo;<samp>ccr</samp>&rsquo; and &lsquo;<samp>cxer</samp>&rsquo;, which should both be 32-bit

  132. wide.

  133. </p>

  134. <p>The &lsquo;<samp>org.gnu.gdb.power.htm.fpu</samp>&rsquo; feature is optional.  It should

  135. contain the checkpointed 64-bit floating-point registers &lsquo;<samp>cf0</samp>&rsquo;

  136. through &lsquo;<samp>cf31</samp>&rsquo;, as well as the checkpointed 64-bit register

  137. &lsquo;<samp>cfpscr</samp>&rsquo;.

  138. </p>

  139. <p>The &lsquo;<samp>org.gnu.gdb.power.htm.altivec</samp>&rsquo; feature is optional.  It

  140. should contain the checkpointed altivec registers &lsquo;<samp>cvr0</samp>&rsquo; through

  141. &lsquo;<samp>cvr31</samp>&rsquo;, all 128-bit wide.  It should also contain the

  142. checkpointed registers &lsquo;<samp>cvscr</samp>&rsquo; and &lsquo;<samp>cvrsave</samp>&rsquo;, both 32-bit

  143. wide.

  144. </p>

  145. <p>The &lsquo;<samp>org.gnu.gdb.power.htm.vsx</samp>&rsquo; feature is optional.  It should

  146. contain registers &lsquo;<samp>cvs0h</samp>&rsquo; through &lsquo;<samp>cvs31h</samp>&rsquo;.  <small>GDB</small>

  147. will combine these registers with the checkpointed floating point

  148. registers (&lsquo;<samp>cf0</samp>&rsquo; through &lsquo;<samp>cf31</samp>&rsquo;) and the checkpointed

  149. altivec registers (&lsquo;<samp>cvr0</samp>&rsquo; through &lsquo;<samp>cvr31</samp>&rsquo;) to present the

  150. 128-bit wide checkpointed vector-scalar registers &lsquo;<samp>cvs0</samp>&rsquo; through

  151. &lsquo;<samp>cvs63</samp>&rsquo;.  Therefore, this feature requires both

  152. &lsquo;<samp>org.gnu.gdb.power.htm.altivec</samp>&rsquo; and

  153. &lsquo;<samp>org.gnu.gdb.power.htm.fpu</samp>&rsquo;.

  154. </p>

  155. <p>The &lsquo;<samp>org.gnu.gdb.power.htm.ppr</samp>&rsquo; feature is optional.  It should

  156. contain the 64-bit checkpointed register &lsquo;<samp>cppr</samp>&rsquo;.

  157. </p>

  158. <p>The &lsquo;<samp>org.gnu.gdb.power.htm.dscr</samp>&rsquo; feature is optional.  It should

  159. contain the 64-bit checkpointed register &lsquo;<samp>cdscr</samp>&rsquo;.

  160. </p>

  161. <p>The &lsquo;<samp>org.gnu.gdb.power.htm.tar</samp>&rsquo; feature is optional.  It should

  162. contain the 64-bit checkpointed register &lsquo;<samp>ctar</samp>&rsquo;.

  163. </p>

  164. 

  165. <hr>

  166. <div class="header">

  167. <p>

  168. Next: <a href="RISC_002dV-Features.html#RISC_002dV-Features" accesskey="n" rel="next">RISC-V Features</a>, Previous: <a href="OpenRISC-1000-Features.html#OpenRISC-1000-Features" accesskey="p" rel="prev">OpenRISC 1000 Features</a>, Up: <a href="Standard-Target-Features.html#Standard-Target-Features" accesskey="u" rel="up">Standard Target Features</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Concept-Index.html#Concept-Index" title="Index" rel="index">Index</a>]</p>

  169. </div>

  170. 

  171. 

  172. 

  173. </body>

  174. </html>