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  1. /*
  2. * Copyright (c) 2010 by Cristian Maglie <c.maglie@bug.st>
  3. * Copyright (c) 2014 by Paul Stoffregen <paul@pjrc.com> (Transaction API)
  4. * Copyright (c) 2014 by Matthijs Kooijman <matthijs@stdin.nl> (SPISettings AVR)
  5. * SPI Master library for arduino.
  6. *
  7. * This file is free software; you can redistribute it and/or modify
  8. * it under the terms of either the GNU General Public License version 2
  9. * or the GNU Lesser General Public License version 2.1, both as
  10. * published by the Free Software Foundation.
  11. */
  12. #ifndef _SPI_H_INCLUDED
  13. #define _SPI_H_INCLUDED
  14. #include <Arduino.h>
  15. // SPI_HAS_TRANSACTION means SPI has beginTransaction(), endTransaction(),
  16. // usingInterrupt(), and SPISetting(clock, bitOrder, dataMode)
  17. #define SPI_HAS_TRANSACTION 1
  18. // Uncomment this line to add detection of mismatched begin/end transactions.
  19. // A mismatch occurs if other libraries fail to use SPI.endTransaction() for
  20. // each SPI.beginTransaction(). Connect a LED to this pin. The LED will turn
  21. // on if any mismatch is ever detected.
  22. //#define SPI_TRANSACTION_MISMATCH_LED 5
  23. #ifndef __SAM3X8E__
  24. #ifndef LSBFIRST
  25. #define LSBFIRST 0
  26. #endif
  27. #ifndef MSBFIRST
  28. #define MSBFIRST 1
  29. #endif
  30. #endif
  31. #define SPI_MODE0 0x00
  32. #define SPI_MODE1 0x04
  33. #define SPI_MODE2 0x08
  34. #define SPI_MODE3 0x0C
  35. #define SPI_CLOCK_DIV4 0x00
  36. #define SPI_CLOCK_DIV16 0x01
  37. #define SPI_CLOCK_DIV64 0x02
  38. #define SPI_CLOCK_DIV128 0x03
  39. #define SPI_CLOCK_DIV2 0x04
  40. #define SPI_CLOCK_DIV8 0x05
  41. #define SPI_CLOCK_DIV32 0x06
  42. #define SPI_MODE_MASK 0x0C // CPOL = bit 3, CPHA = bit 2 on SPCR
  43. #define SPI_CLOCK_MASK 0x03 // SPR1 = bit 1, SPR0 = bit 0 on SPCR
  44. #define SPI_2XCLOCK_MASK 0x01 // SPI2X = bit 0 on SPSR
  45. /**********************************************************/
  46. /* 8 bit AVR-based boards */
  47. /**********************************************************/
  48. #if defined(__AVR__)
  49. // define SPI_AVR_EIMSK for AVR boards with external interrupt pins
  50. #if defined(EIMSK)
  51. #define SPI_AVR_EIMSK EIMSK
  52. #elif defined(GICR)
  53. #define SPI_AVR_EIMSK GICR
  54. #elif defined(GIMSK)
  55. #define SPI_AVR_EIMSK GIMSK
  56. #endif
  57. class SPISettings {
  58. public:
  59. SPISettings(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) {
  60. if (__builtin_constant_p(clock)) {
  61. init_AlwaysInline(clock, bitOrder, dataMode);
  62. } else {
  63. init_MightInline(clock, bitOrder, dataMode);
  64. }
  65. }
  66. SPISettings() {
  67. init_AlwaysInline(4000000, MSBFIRST, SPI_MODE0);
  68. }
  69. private:
  70. void init_MightInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) {
  71. init_AlwaysInline(clock, bitOrder, dataMode);
  72. }
  73. void init_AlwaysInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode)
  74. __attribute__((__always_inline__)) {
  75. // Clock settings are defined as follows. Note that this shows SPI2X
  76. // inverted, so the bits form increasing numbers. Also note that
  77. // fosc/64 appears twice
  78. // SPR1 SPR0 ~SPI2X Freq
  79. // 0 0 0 fosc/2
  80. // 0 0 1 fosc/4
  81. // 0 1 0 fosc/8
  82. // 0 1 1 fosc/16
  83. // 1 0 0 fosc/32
  84. // 1 0 1 fosc/64
  85. // 1 1 0 fosc/64
  86. // 1 1 1 fosc/128
  87. // We find the fastest clock that is less than or equal to the
  88. // given clock rate. The clock divider that results in clock_setting
  89. // is 2 ^^ (clock_div + 1). If nothing is slow enough, we'll use the
  90. // slowest (128 == 2 ^^ 7, so clock_div = 6).
  91. uint8_t clockDiv;
  92. // When the clock is known at compiletime, use this if-then-else
  93. // cascade, which the compiler knows how to completely optimize
  94. // away. When clock is not known, use a loop instead, which generates
  95. // shorter code.
  96. if (__builtin_constant_p(clock)) {
  97. if (clock >= F_CPU / 2) {
  98. clockDiv = 0;
  99. } else if (clock >= F_CPU / 4) {
  100. clockDiv = 1;
  101. } else if (clock >= F_CPU / 8) {
  102. clockDiv = 2;
  103. } else if (clock >= F_CPU / 16) {
  104. clockDiv = 3;
  105. } else if (clock >= F_CPU / 32) {
  106. clockDiv = 4;
  107. } else if (clock >= F_CPU / 64) {
  108. clockDiv = 5;
  109. } else {
  110. clockDiv = 6;
  111. }
  112. } else {
  113. uint32_t clockSetting = F_CPU / 2;
  114. clockDiv = 0;
  115. while (clockDiv < 6 && clock < clockSetting) {
  116. clockSetting /= 2;
  117. clockDiv++;
  118. }
  119. }
  120. // Compensate for the duplicate fosc/64
  121. if (clockDiv == 6)
  122. clockDiv = 7;
  123. // Invert the SPI2X bit
  124. clockDiv ^= 0x1;
  125. // Pack into the SPISettings class
  126. spcr = _BV(SPE) | _BV(MSTR) | ((bitOrder == LSBFIRST) ? _BV(DORD) : 0) |
  127. (dataMode & SPI_MODE_MASK) | ((clockDiv >> 1) & SPI_CLOCK_MASK);
  128. spsr = clockDiv & SPI_2XCLOCK_MASK;
  129. }
  130. uint8_t spcr;
  131. uint8_t spsr;
  132. friend class SPIClass;
  133. };
  134. class SPIClass {
  135. public:
  136. // Initialize the SPI library
  137. static void begin();
  138. // If SPI is used from within an interrupt, this function registers
  139. // that interrupt with the SPI library, so beginTransaction() can
  140. // prevent conflicts. The input interruptNumber is the number used
  141. // with attachInterrupt. If SPI is used from a different interrupt
  142. // (eg, a timer), interruptNumber should be 255.
  143. static void usingInterrupt(uint8_t interruptNumber);
  144. // Before using SPI.transfer() or asserting chip select pins,
  145. // this function is used to gain exclusive access to the SPI bus
  146. // and configure the correct settings.
  147. inline static void beginTransaction(SPISettings settings) {
  148. if (interruptMode > 0) {
  149. #ifdef SPI_AVR_EIMSK
  150. if (interruptMode == 1) {
  151. interruptSave = SPI_AVR_EIMSK;
  152. SPI_AVR_EIMSK &= ~interruptMask;
  153. } else
  154. #endif
  155. {
  156. uint8_t tmp = SREG;
  157. cli();
  158. interruptSave = tmp;
  159. }
  160. }
  161. #ifdef SPI_TRANSACTION_MISMATCH_LED
  162. if (inTransactionFlag) {
  163. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  164. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  165. }
  166. inTransactionFlag = 1;
  167. #endif
  168. SPCR = settings.spcr;
  169. SPSR = settings.spsr;
  170. }
  171. // Write to the SPI bus (MOSI pin) and also receive (MISO pin)
  172. inline static uint8_t transfer(uint8_t data) {
  173. SPDR = data;
  174. asm volatile("nop");
  175. while (!(SPSR & _BV(SPIF))) ; // wait
  176. return SPDR;
  177. }
  178. inline static uint16_t transfer16(uint16_t data) {
  179. union { uint16_t val; struct { uint8_t lsb; uint8_t msb; }; } in, out;
  180. in.val = data;
  181. if ((SPCR & _BV(DORD))) {
  182. SPDR = in.lsb;
  183. asm volatile("nop");
  184. while (!(SPSR & _BV(SPIF))) ;
  185. out.lsb = SPDR;
  186. SPDR = in.msb;
  187. asm volatile("nop");
  188. while (!(SPSR & _BV(SPIF))) ;
  189. out.msb = SPDR;
  190. } else {
  191. SPDR = in.msb;
  192. asm volatile("nop");
  193. while (!(SPSR & _BV(SPIF))) ;
  194. out.msb = SPDR;
  195. SPDR = in.lsb;
  196. asm volatile("nop");
  197. while (!(SPSR & _BV(SPIF))) ;
  198. out.lsb = SPDR;
  199. }
  200. return out.val;
  201. }
  202. inline static void transfer(void *buf, size_t count) {
  203. if (count == 0) return;
  204. uint8_t *p = (uint8_t *)buf;
  205. SPDR = *p;
  206. while (--count > 0) {
  207. uint8_t out = *(p + 1);
  208. while (!(SPSR & _BV(SPIF))) ;
  209. uint8_t in = SPDR;
  210. SPDR = out;
  211. *p++ = in;
  212. }
  213. while (!(SPSR & _BV(SPIF))) ;
  214. *p = SPDR;
  215. }
  216. // After performing a group of transfers and releasing the chip select
  217. // signal, this function allows others to access the SPI bus
  218. inline static void endTransaction(void) {
  219. #ifdef SPI_TRANSACTION_MISMATCH_LED
  220. if (!inTransactionFlag) {
  221. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  222. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  223. }
  224. inTransactionFlag = 0;
  225. #endif
  226. if (interruptMode > 0) {
  227. #ifdef SPI_AVR_EIMSK
  228. if (interruptMode == 1) {
  229. SPI_AVR_EIMSK = interruptSave;
  230. } else
  231. #endif
  232. {
  233. SREG = interruptSave;
  234. }
  235. }
  236. }
  237. // Disable the SPI bus
  238. static void end();
  239. // This function is deprecated. New applications should use
  240. // beginTransaction() to configure SPI settings.
  241. inline static void setBitOrder(uint8_t bitOrder) {
  242. if (bitOrder == LSBFIRST) SPCR |= _BV(DORD);
  243. else SPCR &= ~(_BV(DORD));
  244. }
  245. // This function is deprecated. New applications should use
  246. // beginTransaction() to configure SPI settings.
  247. inline static void setDataMode(uint8_t dataMode) {
  248. SPCR = (SPCR & ~SPI_MODE_MASK) | dataMode;
  249. }
  250. // This function is deprecated. New applications should use
  251. // beginTransaction() to configure SPI settings.
  252. inline static void setClockDivider(uint8_t clockDiv) {
  253. SPCR = (SPCR & ~SPI_CLOCK_MASK) | (clockDiv & SPI_CLOCK_MASK);
  254. SPSR = (SPSR & ~SPI_2XCLOCK_MASK) | ((clockDiv >> 2) & SPI_2XCLOCK_MASK);
  255. }
  256. // These undocumented functions should not be used. SPI.transfer()
  257. // polls the hardware flag which is automatically cleared as the
  258. // AVR responds to SPI's interrupt
  259. inline static void attachInterrupt() { SPCR |= _BV(SPIE); }
  260. inline static void detachInterrupt() { SPCR &= ~_BV(SPIE); }
  261. private:
  262. static uint8_t interruptMode; // 0=none, 1=mask, 2=global
  263. static uint8_t interruptMask; // which interrupts to mask
  264. static uint8_t interruptSave; // temp storage, to restore state
  265. #ifdef SPI_TRANSACTION_MISMATCH_LED
  266. static uint8_t inTransactionFlag;
  267. #endif
  268. };
  269. /**********************************************************/
  270. /* 32 bit Teensy 3.0 and 3.1 */
  271. /**********************************************************/
  272. #elif defined(__arm__) && defined(TEENSYDUINO) && defined(KINETISK)
  273. #define SPI_HAS_NOTUSINGINTERRUPT 1
  274. class SPISettings {
  275. public:
  276. SPISettings(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) {
  277. if (__builtin_constant_p(clock)) {
  278. init_AlwaysInline(clock, bitOrder, dataMode);
  279. } else {
  280. init_MightInline(clock, bitOrder, dataMode);
  281. }
  282. }
  283. SPISettings() {
  284. init_AlwaysInline(4000000, MSBFIRST, SPI_MODE0);
  285. }
  286. private:
  287. void init_MightInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) {
  288. init_AlwaysInline(clock, bitOrder, dataMode);
  289. }
  290. void init_AlwaysInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode)
  291. __attribute__((__always_inline__)) {
  292. uint32_t t, c = SPI_CTAR_FMSZ(7);
  293. if (bitOrder == LSBFIRST) c |= SPI_CTAR_LSBFE;
  294. if (__builtin_constant_p(clock)) {
  295. if (clock >= F_BUS / 2) {
  296. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(0) | SPI_CTAR_DBR
  297. | SPI_CTAR_CSSCK(0);
  298. } else if (clock >= F_BUS / 3) {
  299. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(0) | SPI_CTAR_DBR
  300. | SPI_CTAR_CSSCK(0);
  301. } else if (clock >= F_BUS / 4) {
  302. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(0) | SPI_CTAR_CSSCK(0);
  303. } else if (clock >= F_BUS / 5) {
  304. t = SPI_CTAR_PBR(2) | SPI_CTAR_BR(0) | SPI_CTAR_DBR
  305. | SPI_CTAR_CSSCK(0);
  306. } else if (clock >= F_BUS / 6) {
  307. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(0) | SPI_CTAR_CSSCK(0);
  308. } else if (clock >= F_BUS / 8) {
  309. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(1) | SPI_CTAR_CSSCK(1);
  310. } else if (clock >= F_BUS / 10) {
  311. t = SPI_CTAR_PBR(2) | SPI_CTAR_BR(0) | SPI_CTAR_CSSCK(0);
  312. } else if (clock >= F_BUS / 12) {
  313. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(1) | SPI_CTAR_CSSCK(1);
  314. } else if (clock >= F_BUS / 16) {
  315. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(3) | SPI_CTAR_CSSCK(2);
  316. } else if (clock >= F_BUS / 20) {
  317. t = SPI_CTAR_PBR(2) | SPI_CTAR_BR(1) | SPI_CTAR_CSSCK(0);
  318. } else if (clock >= F_BUS / 24) {
  319. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(3) | SPI_CTAR_CSSCK(2);
  320. } else if (clock >= F_BUS / 32) {
  321. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(4) | SPI_CTAR_CSSCK(3);
  322. } else if (clock >= F_BUS / 40) {
  323. t = SPI_CTAR_PBR(2) | SPI_CTAR_BR(3) | SPI_CTAR_CSSCK(2);
  324. } else if (clock >= F_BUS / 56) {
  325. t = SPI_CTAR_PBR(3) | SPI_CTAR_BR(3) | SPI_CTAR_CSSCK(2);
  326. } else if (clock >= F_BUS / 64) {
  327. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(5) | SPI_CTAR_CSSCK(4);
  328. } else if (clock >= F_BUS / 96) {
  329. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(5) | SPI_CTAR_CSSCK(4);
  330. } else if (clock >= F_BUS / 128) {
  331. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(6) | SPI_CTAR_CSSCK(5);
  332. } else if (clock >= F_BUS / 192) {
  333. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(6) | SPI_CTAR_CSSCK(5);
  334. } else if (clock >= F_BUS / 256) {
  335. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(7) | SPI_CTAR_CSSCK(6);
  336. } else if (clock >= F_BUS / 384) {
  337. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(7) | SPI_CTAR_CSSCK(6);
  338. } else if (clock >= F_BUS / 512) {
  339. t = SPI_CTAR_PBR(0) | SPI_CTAR_BR(8) | SPI_CTAR_CSSCK(7);
  340. } else if (clock >= F_BUS / 640) {
  341. t = SPI_CTAR_PBR(2) | SPI_CTAR_BR(7) | SPI_CTAR_CSSCK(6);
  342. } else { /* F_BUS / 768 */
  343. t = SPI_CTAR_PBR(1) | SPI_CTAR_BR(8) | SPI_CTAR_CSSCK(7);
  344. }
  345. } else {
  346. for (uint32_t i=0; i<23; i++) {
  347. t = ctar_clock_table[i];
  348. if (clock >= F_BUS / ctar_div_table[i]) break;
  349. }
  350. }
  351. if (dataMode & 0x08) {
  352. c |= SPI_CTAR_CPOL;
  353. }
  354. if (dataMode & 0x04) {
  355. c |= SPI_CTAR_CPHA;
  356. t = (t & 0xFFFF0FFF) | ((t & 0xF000) >> 4);
  357. }
  358. ctar = c | t;
  359. }
  360. static const uint16_t ctar_div_table[23];
  361. static const uint32_t ctar_clock_table[23];
  362. uint32_t ctar;
  363. friend class SPIClass;
  364. #if defined(__MK64FX512__) || defined(__MK66FX1M0__)
  365. friend class SPI1Class;
  366. #endif
  367. };
  368. class SPIClass {
  369. public:
  370. // Initialize the SPI library
  371. static void begin();
  372. // If SPI is to used from within an interrupt, this function registers
  373. // that interrupt with the SPI library, so beginTransaction() can
  374. // prevent conflicts. The input interruptNumber is the number used
  375. // with attachInterrupt. If SPI is used from a different interrupt
  376. // (eg, a timer), interruptNumber should be 255.
  377. static void usingInterrupt(uint8_t n) {
  378. if (n == 3 || n == 4 || n == 24 || n == 33) {
  379. usingInterrupt(IRQ_PORTA);
  380. } else if (n == 0 || n == 1 || (n >= 16 && n <= 19) || n == 25 || n == 32) {
  381. usingInterrupt(IRQ_PORTB);
  382. } else if ((n >= 9 && n <= 13) || n == 15 || n == 22 || n == 23
  383. || (n >= 27 && n <= 30)) {
  384. usingInterrupt(IRQ_PORTC);
  385. } else if (n == 2 || (n >= 5 && n <= 8) || n == 14 || n == 20 || n == 21) {
  386. usingInterrupt(IRQ_PORTD);
  387. } else if (n == 26 || n == 31) {
  388. usingInterrupt(IRQ_PORTE);
  389. }
  390. }
  391. static void usingInterrupt(IRQ_NUMBER_t interruptName);
  392. static void notUsingInterrupt(IRQ_NUMBER_t interruptName);
  393. // Before using SPI.transfer() or asserting chip select pins,
  394. // this function is used to gain exclusive access to the SPI bus
  395. // and configure the correct settings.
  396. inline static void beginTransaction(SPISettings settings) {
  397. if (interruptMasksUsed) {
  398. __disable_irq();
  399. if (interruptMasksUsed & 0x01) {
  400. interruptSave[0] = NVIC_ICER0 & interruptMask[0];
  401. NVIC_ICER0 = interruptSave[0];
  402. }
  403. #if NVIC_NUM_INTERRUPTS > 32
  404. if (interruptMasksUsed & 0x02) {
  405. interruptSave[1] = NVIC_ICER1 & interruptMask[1];
  406. NVIC_ICER1 = interruptSave[1];
  407. }
  408. #endif
  409. #if NVIC_NUM_INTERRUPTS > 64 && defined(NVIC_ISER2)
  410. if (interruptMasksUsed & 0x04) {
  411. interruptSave[2] = NVIC_ICER2 & interruptMask[2];
  412. NVIC_ICER2 = interruptSave[2];
  413. }
  414. #endif
  415. #if NVIC_NUM_INTERRUPTS > 96 && defined(NVIC_ISER3)
  416. if (interruptMasksUsed & 0x08) {
  417. interruptSave[3] = NVIC_ICER3 & interruptMask[3];
  418. NVIC_ICER3 = interruptSave[3];
  419. }
  420. #endif
  421. __enable_irq();
  422. }
  423. #ifdef SPI_TRANSACTION_MISMATCH_LED
  424. if (inTransactionFlag) {
  425. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  426. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  427. }
  428. inTransactionFlag = 1;
  429. #endif
  430. if (SPI0_CTAR0 != settings.ctar) {
  431. SPI0_MCR = SPI_MCR_MDIS | SPI_MCR_HALT | SPI_MCR_PCSIS(0x1F);
  432. SPI0_CTAR0 = settings.ctar;
  433. SPI0_CTAR1 = settings.ctar| SPI_CTAR_FMSZ(8);
  434. SPI0_MCR = SPI_MCR_MSTR | SPI_MCR_PCSIS(0x1F);
  435. }
  436. }
  437. // Write to the SPI bus (MOSI pin) and also receive (MISO pin)
  438. inline static uint8_t transfer(uint8_t data) {
  439. SPI0_SR = SPI_SR_TCF;
  440. SPI0_PUSHR = data;
  441. while (!(SPI0_SR & SPI_SR_TCF)) ; // wait
  442. return SPI0_POPR;
  443. }
  444. inline static uint16_t transfer16(uint16_t data) {
  445. SPI0_SR = SPI_SR_TCF;
  446. SPI0_PUSHR = data | SPI_PUSHR_CTAS(1);
  447. while (!(SPI0_SR & SPI_SR_TCF)) ; // wait
  448. return SPI0_POPR;
  449. }
  450. inline static void transfer(void *buf, size_t count) {
  451. if (count == 0) return;
  452. uint8_t *p = (uint8_t *)buf;
  453. SPDR = *p;
  454. while (--count > 0) {
  455. uint8_t out = *(p + 1);
  456. while (!(SPSR & _BV(SPIF))) ;
  457. uint8_t in = SPDR;
  458. SPDR = out;
  459. *p++ = in;
  460. }
  461. while (!(SPSR & _BV(SPIF))) ;
  462. *p = SPDR;
  463. }
  464. // After performing a group of transfers and releasing the chip select
  465. // signal, this function allows others to access the SPI bus
  466. inline static void endTransaction(void) {
  467. #ifdef SPI_TRANSACTION_MISMATCH_LED
  468. if (!inTransactionFlag) {
  469. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  470. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  471. }
  472. inTransactionFlag = 0;
  473. #endif
  474. if (interruptMasksUsed) {
  475. if (interruptMasksUsed & 0x01) {
  476. NVIC_ISER0 = interruptSave[0];
  477. }
  478. #if NVIC_NUM_INTERRUPTS > 32
  479. if (interruptMasksUsed & 0x02) {
  480. NVIC_ISER1 = interruptSave[1];
  481. }
  482. #endif
  483. #if NVIC_NUM_INTERRUPTS > 64 && defined(NVIC_ISER2)
  484. if (interruptMasksUsed & 0x04) {
  485. NVIC_ISER2 = interruptSave[2];
  486. }
  487. #endif
  488. #if NVIC_NUM_INTERRUPTS > 96 && defined(NVIC_ISER3)
  489. if (interruptMasksUsed & 0x08) {
  490. NVIC_ISER3 = interruptSave[3];
  491. }
  492. #endif
  493. }
  494. }
  495. // Disable the SPI bus
  496. static void end();
  497. // This function is deprecated. New applications should use
  498. // beginTransaction() to configure SPI settings.
  499. static void setBitOrder(uint8_t bitOrder);
  500. // This function is deprecated. New applications should use
  501. // beginTransaction() to configure SPI settings.
  502. static void setDataMode(uint8_t dataMode);
  503. // This function is deprecated. New applications should use
  504. // beginTransaction() to configure SPI settings.
  505. inline static void setClockDivider(uint8_t clockDiv) {
  506. if (clockDiv == SPI_CLOCK_DIV2) {
  507. setClockDivider_noInline(SPISettings(12000000, MSBFIRST, SPI_MODE0).ctar);
  508. } else if (clockDiv == SPI_CLOCK_DIV4) {
  509. setClockDivider_noInline(SPISettings(4000000, MSBFIRST, SPI_MODE0).ctar);
  510. } else if (clockDiv == SPI_CLOCK_DIV8) {
  511. setClockDivider_noInline(SPISettings(2000000, MSBFIRST, SPI_MODE0).ctar);
  512. } else if (clockDiv == SPI_CLOCK_DIV16) {
  513. setClockDivider_noInline(SPISettings(1000000, MSBFIRST, SPI_MODE0).ctar);
  514. } else if (clockDiv == SPI_CLOCK_DIV32) {
  515. setClockDivider_noInline(SPISettings(500000, MSBFIRST, SPI_MODE0).ctar);
  516. } else if (clockDiv == SPI_CLOCK_DIV64) {
  517. setClockDivider_noInline(SPISettings(250000, MSBFIRST, SPI_MODE0).ctar);
  518. } else { /* clockDiv == SPI_CLOCK_DIV128 */
  519. setClockDivider_noInline(SPISettings(125000, MSBFIRST, SPI_MODE0).ctar);
  520. }
  521. }
  522. static void setClockDivider_noInline(uint32_t clk);
  523. // These undocumented functions should not be used. SPI.transfer()
  524. // polls the hardware flag which is automatically cleared as the
  525. // AVR responds to SPI's interrupt
  526. inline static void attachInterrupt() { }
  527. inline static void detachInterrupt() { }
  528. // Teensy 3.x can use alternate pins for these 3 SPI signals.
  529. inline static void setMOSI(uint8_t pin) __attribute__((always_inline)) {
  530. SPCR.setMOSI(pin);
  531. }
  532. inline static void setMISO(uint8_t pin) __attribute__((always_inline)) {
  533. SPCR.setMISO(pin);
  534. }
  535. inline static void setSCK(uint8_t pin) __attribute__((always_inline)) {
  536. SPCR.setSCK(pin);
  537. }
  538. // return true if "pin" has special chip select capability
  539. static uint8_t pinIsChipSelect(uint8_t pin);
  540. // return true if both pin1 and pin2 have independent chip select capability
  541. static bool pinIsChipSelect(uint8_t pin1, uint8_t pin2);
  542. // configure a pin for chip select and return its SPI_MCR_PCSIS bitmask
  543. static uint8_t setCS(uint8_t pin);
  544. private:
  545. static uint8_t interruptMasksUsed;
  546. static uint32_t interruptMask[(NVIC_NUM_INTERRUPTS+31)/32];
  547. static uint32_t interruptSave[(NVIC_NUM_INTERRUPTS+31)/32];
  548. #ifdef SPI_TRANSACTION_MISMATCH_LED
  549. static uint8_t inTransactionFlag;
  550. #endif
  551. };
  552. /**********************************************************/
  553. /* Teensy 3.4 and 3.5 have SPI1 as well */
  554. /**********************************************************/
  555. #if defined(__MK64FX512__) || defined(__MK66FX1M0__)
  556. class SPI1Class {
  557. public:
  558. // Initialize the SPI library
  559. static void begin();
  560. // If SPI is to used from within an interrupt, this function registers
  561. // that interrupt with the SPI library, so beginTransaction() can
  562. // prevent conflicts. The input interruptNumber is the number used
  563. // with attachInterrupt. If SPI is used from a different interrupt
  564. // (eg, a timer), interruptNumber should be 255.
  565. static void usingInterrupt(uint8_t n) {
  566. if (n == 3 || n == 4 || n == 24 || n == 33) {
  567. usingInterrupt(IRQ_PORTA);
  568. } else if (n == 0 || n == 1 || (n >= 16 && n <= 19) || n == 25 || n == 32) {
  569. usingInterrupt(IRQ_PORTB);
  570. } else if ((n >= 9 && n <= 13) || n == 15 || n == 22 || n == 23
  571. || (n >= 27 && n <= 30)) {
  572. usingInterrupt(IRQ_PORTC);
  573. } else if (n == 2 || (n >= 5 && n <= 8) || n == 14 || n == 20 || n == 21) {
  574. usingInterrupt(IRQ_PORTD);
  575. } else if (n == 26 || n == 31) {
  576. usingInterrupt(IRQ_PORTE);
  577. }
  578. }
  579. static void usingInterrupt(IRQ_NUMBER_t interruptName);
  580. static void notUsingInterrupt(IRQ_NUMBER_t interruptName);
  581. // Before using SPI.transfer() or asserting chip select pins,
  582. // this function is used to gain exclusive access to the SPI bus
  583. // and configure the correct settings.
  584. inline static void beginTransaction(SPISettings settings) {
  585. if (interruptMasksUsed) {
  586. __disable_irq();
  587. if (interruptMasksUsed & 0x01) {
  588. interruptSave[0] = NVIC_ICER0 & interruptMask[0];
  589. NVIC_ICER0 = interruptSave[0];
  590. }
  591. #if NVIC_NUM_INTERRUPTS > 32
  592. if (interruptMasksUsed & 0x02) {
  593. interruptSave[1] = NVIC_ICER1 & interruptMask[1];
  594. NVIC_ICER1 = interruptSave[1];
  595. }
  596. #endif
  597. #if NVIC_NUM_INTERRUPTS > 64 && defined(NVIC_ISER2)
  598. if (interruptMasksUsed & 0x04) {
  599. interruptSave[2] = NVIC_ICER2 & interruptMask[2];
  600. NVIC_ICER2 = interruptSave[2];
  601. }
  602. #endif
  603. #if NVIC_NUM_INTERRUPTS > 96 && defined(NVIC_ISER3)
  604. if (interruptMasksUsed & 0x08) {
  605. interruptSave[3] = NVIC_ICER3 & interruptMask[3];
  606. NVIC_ICER3 = interruptSave[3];
  607. }
  608. #endif
  609. __enable_irq();
  610. }
  611. #ifdef SPI_TRANSACTION_MISMATCH_LED
  612. if (inTransactionFlag) {
  613. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  614. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  615. }
  616. inTransactionFlag = 1;
  617. #endif
  618. if (SPI1_CTAR0 != settings.ctar) {
  619. SPI1_MCR = SPI_MCR_MDIS | SPI_MCR_HALT | SPI_MCR_PCSIS(0x1F);
  620. SPI1_CTAR0 = settings.ctar;
  621. SPI1_CTAR1 = settings.ctar| SPI_CTAR_FMSZ(8);
  622. SPI1_MCR = SPI_MCR_MSTR | SPI_MCR_PCSIS(0x1F);
  623. }
  624. }
  625. // Write to the SPI bus (MOSI pin) and also receive (MISO pin)
  626. inline static uint8_t transfer(uint8_t data) {
  627. SPI1_SR = SPI_SR_TCF;
  628. SPI1_PUSHR = data;
  629. while (!(SPI1_SR & SPI_SR_TCF)) ; // wait
  630. return SPI1_POPR;
  631. }
  632. inline static uint16_t transfer16(uint16_t data) {
  633. SPI1_SR = SPI_SR_TCF;
  634. SPI1_PUSHR = data | SPI_PUSHR_CTAS(1);
  635. while (!(SPI1_SR & SPI_SR_TCF)) ; // wait
  636. return SPI1_POPR;
  637. }
  638. inline static void transfer(void *buf, size_t count) {
  639. uint8_t *p = (uint8_t *)buf;
  640. while (count--) {
  641. *p = transfer(*p);
  642. p++;
  643. }
  644. }
  645. // After performing a group of transfers and releasing the chip select
  646. // signal, this function allows others to access the SPI bus
  647. inline static void endTransaction(void) {
  648. #ifdef SPI_TRANSACTION_MISMATCH_LED
  649. if (!inTransactionFlag) {
  650. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  651. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  652. }
  653. inTransactionFlag = 0;
  654. #endif
  655. if (interruptMasksUsed) {
  656. if (interruptMasksUsed & 0x01) {
  657. NVIC_ISER0 = interruptSave[0];
  658. }
  659. #if NVIC_NUM_INTERRUPTS > 32
  660. if (interruptMasksUsed & 0x02) {
  661. NVIC_ISER1 = interruptSave[1];
  662. }
  663. #endif
  664. #if NVIC_NUM_INTERRUPTS > 64 && defined(NVIC_ISER2)
  665. if (interruptMasksUsed & 0x04) {
  666. NVIC_ISER2 = interruptSave[2];
  667. }
  668. #endif
  669. #if NVIC_NUM_INTERRUPTS > 96 && defined(NVIC_ISER3)
  670. if (interruptMasksUsed & 0x08) {
  671. NVIC_ISER3 = interruptSave[3];
  672. }
  673. #endif
  674. }
  675. }
  676. // Disable the SPI bus
  677. static void end();
  678. // This function is deprecated. New applications should use
  679. // beginTransaction() to configure SPI settings.
  680. static void setBitOrder(uint8_t bitOrder);
  681. // This function is deprecated. New applications should use
  682. // beginTransaction() to configure SPI settings.
  683. static void setDataMode(uint8_t dataMode);
  684. // This function is deprecated. New applications should use
  685. // beginTransaction() to configure SPI settings.
  686. inline static void setClockDivider(uint8_t clockDiv) {
  687. if (clockDiv == SPI_CLOCK_DIV2) {
  688. setClockDivider_noInline(SPISettings(12000000, MSBFIRST, SPI_MODE0).ctar);
  689. } else if (clockDiv == SPI_CLOCK_DIV4) {
  690. setClockDivider_noInline(SPISettings(4000000, MSBFIRST, SPI_MODE0).ctar);
  691. } else if (clockDiv == SPI_CLOCK_DIV8) {
  692. setClockDivider_noInline(SPISettings(2000000, MSBFIRST, SPI_MODE0).ctar);
  693. } else if (clockDiv == SPI_CLOCK_DIV16) {
  694. setClockDivider_noInline(SPISettings(1000000, MSBFIRST, SPI_MODE0).ctar);
  695. } else if (clockDiv == SPI_CLOCK_DIV32) {
  696. setClockDivider_noInline(SPISettings(500000, MSBFIRST, SPI_MODE0).ctar);
  697. } else if (clockDiv == SPI_CLOCK_DIV64) {
  698. setClockDivider_noInline(SPISettings(250000, MSBFIRST, SPI_MODE0).ctar);
  699. } else { /* clockDiv == SPI_CLOCK_DIV128 */
  700. setClockDivider_noInline(SPISettings(125000, MSBFIRST, SPI_MODE0).ctar);
  701. }
  702. }
  703. static void setClockDivider_noInline(uint32_t clk);
  704. // These undocumented functions should not be used. SPI.transfer()
  705. // polls the hardware flag which is automatically cleared as the
  706. // AVR responds to SPI's interrupt
  707. inline static void attachInterrupt() { }
  708. inline static void detachInterrupt() { }
  709. // Teensy 3.x can use alternate pins for these 3 SPI signals.
  710. inline static void setMOSI(uint8_t pin) __attribute__((always_inline)) {
  711. SPCR1.setMOSI(pin);
  712. }
  713. inline static void setMISO(uint8_t pin) __attribute__((always_inline)) {
  714. SPCR1.setMISO(pin);
  715. }
  716. inline static void setSCK(uint8_t pin) __attribute__((always_inline)) {
  717. SPCR1.setSCK(pin);
  718. }
  719. // return true if "pin" has special chip select capability
  720. static bool pinIsChipSelect(uint8_t pin);
  721. // return true if both pin1 and pin2 have independent chip select capability
  722. static bool pinIsChipSelect(uint8_t pin1, uint8_t pin2);
  723. // configure a pin for chip select and return its SPI_MCR_PCSIS bitmask
  724. static uint8_t setCS(uint8_t pin);
  725. private:
  726. static uint8_t interruptMasksUsed;
  727. static uint32_t interruptMask[(NVIC_NUM_INTERRUPTS+31)/32];
  728. static uint32_t interruptSave[(NVIC_NUM_INTERRUPTS+31)/32];
  729. #ifdef SPI_TRANSACTION_MISMATCH_LED
  730. static uint8_t inTransactionFlag;
  731. #endif
  732. };
  733. #endif
  734. /**********************************************************/
  735. /* 32 bit Teensy-LC */
  736. /**********************************************************/
  737. #elif defined(__arm__) && defined(TEENSYDUINO) && defined(KINETISL)
  738. class SPISettings {
  739. public:
  740. SPISettings(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) {
  741. if (__builtin_constant_p(clock)) {
  742. init_AlwaysInline(clock, bitOrder, dataMode);
  743. } else {
  744. init_MightInline(clock, bitOrder, dataMode);
  745. }
  746. }
  747. SPISettings() {
  748. init_AlwaysInline(4000000, MSBFIRST, SPI_MODE0);
  749. }
  750. private:
  751. void init_MightInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) {
  752. init_AlwaysInline(clock, bitOrder, dataMode);
  753. }
  754. void init_AlwaysInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode)
  755. __attribute__((__always_inline__)) {
  756. uint8_t c = SPI_C1_MSTR | SPI_C1_SPE;
  757. if (dataMode & 0x04) c |= SPI_C1_CPHA;
  758. if (dataMode & 0x08) c |= SPI_C1_CPOL;
  759. if (bitOrder == LSBFIRST) c |= SPI_C1_LSBFE;
  760. c1 = c;
  761. if (__builtin_constant_p(clock)) {
  762. if (clock >= F_BUS / 2) { c = SPI_BR_SPPR(0) | SPI_BR_SPR(0);
  763. } else if (clock >= F_BUS / 4) { c = SPI_BR_SPPR(1) | SPI_BR_SPR(0);
  764. } else if (clock >= F_BUS / 6) { c = SPI_BR_SPPR(2) | SPI_BR_SPR(0);
  765. } else if (clock >= F_BUS / 8) { c = SPI_BR_SPPR(3) | SPI_BR_SPR(0);
  766. } else if (clock >= F_BUS / 10) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(0);
  767. } else if (clock >= F_BUS / 12) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(0);
  768. } else if (clock >= F_BUS / 14) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(0);
  769. } else if (clock >= F_BUS / 16) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(0);
  770. } else if (clock >= F_BUS / 20) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(1);
  771. } else if (clock >= F_BUS / 24) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(1);
  772. } else if (clock >= F_BUS / 28) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(1);
  773. } else if (clock >= F_BUS / 32) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(1);
  774. } else if (clock >= F_BUS / 40) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(2);
  775. } else if (clock >= F_BUS / 48) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(2);
  776. } else if (clock >= F_BUS / 56) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(2);
  777. } else if (clock >= F_BUS / 64) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(2);
  778. } else if (clock >= F_BUS / 80) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(3);
  779. } else if (clock >= F_BUS / 96) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(3);
  780. } else if (clock >= F_BUS / 112) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(3);
  781. } else if (clock >= F_BUS / 128) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(3);
  782. } else if (clock >= F_BUS / 160) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(4);
  783. } else if (clock >= F_BUS / 192) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(4);
  784. } else if (clock >= F_BUS / 224) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(4);
  785. } else if (clock >= F_BUS / 256) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(4);
  786. } else if (clock >= F_BUS / 320) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(5);
  787. } else if (clock >= F_BUS / 384) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(5);
  788. } else if (clock >= F_BUS / 448) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(5);
  789. } else if (clock >= F_BUS / 512) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(5);
  790. } else if (clock >= F_BUS / 640) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(6);
  791. } else /* F_BUS / 768 */ { c = SPI_BR_SPPR(5) | SPI_BR_SPR(6);
  792. }
  793. } else {
  794. for (uint32_t i=0; i<30; i++) {
  795. c = br_clock_table[i];
  796. if (clock >= F_BUS / br_div_table[i]) break;
  797. }
  798. }
  799. br0 = c;
  800. if (__builtin_constant_p(clock)) {
  801. if (clock >= (F_PLL/2) / 2) { c = SPI_BR_SPPR(0) | SPI_BR_SPR(0);
  802. } else if (clock >= (F_PLL/2) / 4) { c = SPI_BR_SPPR(1) | SPI_BR_SPR(0);
  803. } else if (clock >= (F_PLL/2) / 6) { c = SPI_BR_SPPR(2) | SPI_BR_SPR(0);
  804. } else if (clock >= (F_PLL/2) / 8) { c = SPI_BR_SPPR(3) | SPI_BR_SPR(0);
  805. } else if (clock >= (F_PLL/2) / 10) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(0);
  806. } else if (clock >= (F_PLL/2) / 12) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(0);
  807. } else if (clock >= (F_PLL/2) / 14) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(0);
  808. } else if (clock >= (F_PLL/2) / 16) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(0);
  809. } else if (clock >= (F_PLL/2) / 20) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(1);
  810. } else if (clock >= (F_PLL/2) / 24) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(1);
  811. } else if (clock >= (F_PLL/2) / 28) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(1);
  812. } else if (clock >= (F_PLL/2) / 32) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(1);
  813. } else if (clock >= (F_PLL/2) / 40) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(2);
  814. } else if (clock >= (F_PLL/2) / 48) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(2);
  815. } else if (clock >= (F_PLL/2) / 56) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(2);
  816. } else if (clock >= (F_PLL/2) / 64) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(2);
  817. } else if (clock >= (F_PLL/2) / 80) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(3);
  818. } else if (clock >= (F_PLL/2) / 96) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(3);
  819. } else if (clock >= (F_PLL/2) / 112) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(3);
  820. } else if (clock >= (F_PLL/2) / 128) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(3);
  821. } else if (clock >= (F_PLL/2) / 160) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(4);
  822. } else if (clock >= (F_PLL/2) / 192) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(4);
  823. } else if (clock >= (F_PLL/2) / 224) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(4);
  824. } else if (clock >= (F_PLL/2) / 256) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(4);
  825. } else if (clock >= (F_PLL/2) / 320) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(5);
  826. } else if (clock >= (F_PLL/2) / 384) { c = SPI_BR_SPPR(5) | SPI_BR_SPR(5);
  827. } else if (clock >= (F_PLL/2) / 448) { c = SPI_BR_SPPR(6) | SPI_BR_SPR(5);
  828. } else if (clock >= (F_PLL/2) / 512) { c = SPI_BR_SPPR(7) | SPI_BR_SPR(5);
  829. } else if (clock >= (F_PLL/2) / 640) { c = SPI_BR_SPPR(4) | SPI_BR_SPR(6);
  830. } else /* (F_PLL/2) / 768 */ { c = SPI_BR_SPPR(5) | SPI_BR_SPR(6);
  831. }
  832. } else {
  833. for (uint32_t i=0; i<30; i++) {
  834. c = br_clock_table[i];
  835. if (clock >= (F_PLL/2) / br_div_table[i]) break;
  836. }
  837. }
  838. br1 = c;
  839. }
  840. static const uint8_t br_clock_table[30];
  841. static const uint16_t br_div_table[30];
  842. uint8_t c1, br0, br1;
  843. friend class SPIClass;
  844. friend class SPI1Class;
  845. };
  846. class SPIClass {
  847. public:
  848. // Initialize the SPI library
  849. static void begin();
  850. // If SPI is to used from within an interrupt, this function registers
  851. // that interrupt with the SPI library, so beginTransaction() can
  852. // prevent conflicts. The input interruptNumber is the number used
  853. // with attachInterrupt. If SPI is used from a different interrupt
  854. // (eg, a timer), interruptNumber should be 255.
  855. static void usingInterrupt(uint8_t n) {
  856. if (n == 3 || n == 4) {
  857. usingInterrupt(IRQ_PORTA);
  858. } else if ((n >= 2 && n <= 15) || (n >= 20 && n <= 23)) {
  859. usingInterrupt(IRQ_PORTCD);
  860. }
  861. }
  862. static void usingInterrupt(IRQ_NUMBER_t interruptName) {
  863. uint32_t n = (uint32_t)interruptName;
  864. if (n < NVIC_NUM_INTERRUPTS) interruptMask |= (1 << n);
  865. }
  866. static void notUsingInterrupt(IRQ_NUMBER_t interruptName) {
  867. uint32_t n = (uint32_t)interruptName;
  868. if (n < NVIC_NUM_INTERRUPTS) interruptMask &= ~(1 << n);
  869. }
  870. // Before using SPI.transfer() or asserting chip select pins,
  871. // this function is used to gain exclusive access to the SPI bus
  872. // and configure the correct settings.
  873. inline static void beginTransaction(SPISettings settings) {
  874. if (interruptMask) {
  875. __disable_irq();
  876. interruptSave = NVIC_ICER0 & interruptMask;
  877. NVIC_ICER0 = interruptSave;
  878. __enable_irq();
  879. }
  880. #ifdef SPI_TRANSACTION_MISMATCH_LED
  881. if (inTransactionFlag) {
  882. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  883. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  884. }
  885. inTransactionFlag = 1;
  886. #endif
  887. SPI0_C1 = settings.c1;
  888. SPI0_BR = settings.br0;
  889. }
  890. // Write to the SPI bus (MOSI pin) and also receive (MISO pin)
  891. inline static uint8_t transfer(uint8_t data) {
  892. SPI0_DL = data;
  893. while (!(SPI0_S & SPI_S_SPRF)) ; // wait
  894. return SPI0_DL;
  895. }
  896. inline static uint16_t transfer16(uint16_t data) {
  897. SPI0_C2 = SPI_C2_SPIMODE;
  898. SPI0_S;
  899. SPI0_DL = data;
  900. SPI0_DH = data >> 8;
  901. while (!(SPI0_S & SPI_S_SPRF)) ; // wait
  902. uint16_t r = SPI0_DL | (SPI0_DH << 8);
  903. SPI0_C2 = 0;
  904. SPI0_S;
  905. return r;
  906. }
  907. inline static void transfer(void *buf, size_t count) {
  908. if (count == 0) return;
  909. uint8_t *p = (uint8_t *)buf;
  910. while (!(SPI0_S & SPI_S_SPTEF)) ; // wait
  911. SPI0_DL = *p;
  912. while (--count > 0) {
  913. uint8_t out = *(p + 1);
  914. while (!(SPI0_S & SPI_S_SPTEF)) ; // wait
  915. __disable_irq();
  916. SPI0_DL = out;
  917. while (!(SPI0_S & SPI_S_SPRF)) ; // wait
  918. uint8_t in = SPI0_DL;
  919. __enable_irq();
  920. *p++ = in;
  921. }
  922. while (!(SPI0_S & SPI_S_SPRF)) ; // wait
  923. *p = SPDR;
  924. }
  925. // After performing a group of transfers and releasing the chip select
  926. // signal, this function allows others to access the SPI bus
  927. inline static void endTransaction(void) {
  928. #ifdef SPI_TRANSACTION_MISMATCH_LED
  929. if (!inTransactionFlag) {
  930. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  931. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  932. }
  933. inTransactionFlag = 0;
  934. #endif
  935. if (interruptMask) {
  936. NVIC_ISER0 = interruptSave;
  937. }
  938. }
  939. // Disable the SPI bus
  940. static void end();
  941. // This function is deprecated. New applications should use
  942. // beginTransaction() to configure SPI settings.
  943. static void setBitOrder(uint8_t bitOrder) {
  944. uint8_t c = SPI0_C1 | SPI_C1_SPE;
  945. if (bitOrder == LSBFIRST) c |= SPI_C1_LSBFE;
  946. else c &= ~SPI_C1_LSBFE;
  947. SPI0_C1 = c;
  948. }
  949. // This function is deprecated. New applications should use
  950. // beginTransaction() to configure SPI settings.
  951. static void setDataMode(uint8_t dataMode) {
  952. uint8_t c = SPI0_C1 | SPI_C1_SPE;
  953. if (dataMode & 0x04) c |= SPI_C1_CPHA;
  954. else c &= ~SPI_C1_CPHA;
  955. if (dataMode & 0x08) c |= SPI_C1_CPOL;
  956. else c &= ~SPI_C1_CPOL;
  957. SPI0_C1 = c;
  958. }
  959. // This function is deprecated. New applications should use
  960. // beginTransaction() to configure SPI settings.
  961. inline static void setClockDivider(uint8_t clockDiv) {
  962. if (clockDiv == SPI_CLOCK_DIV2) {
  963. SPI0_BR = (SPISettings(12000000, MSBFIRST, SPI_MODE0).br0);
  964. } else if (clockDiv == SPI_CLOCK_DIV4) {
  965. SPI0_BR = (SPISettings(4000000, MSBFIRST, SPI_MODE0).br0);
  966. } else if (clockDiv == SPI_CLOCK_DIV8) {
  967. SPI0_BR = (SPISettings(2000000, MSBFIRST, SPI_MODE0).br0);
  968. } else if (clockDiv == SPI_CLOCK_DIV16) {
  969. SPI0_BR = (SPISettings(1000000, MSBFIRST, SPI_MODE0).br0);
  970. } else if (clockDiv == SPI_CLOCK_DIV32) {
  971. SPI0_BR = (SPISettings(500000, MSBFIRST, SPI_MODE0).br0);
  972. } else if (clockDiv == SPI_CLOCK_DIV64) {
  973. SPI0_BR = (SPISettings(250000, MSBFIRST, SPI_MODE0).br0);
  974. } else { /* clockDiv == SPI_CLOCK_DIV128 */
  975. SPI0_BR = (SPISettings(125000, MSBFIRST, SPI_MODE0).br0);
  976. }
  977. }
  978. // These undocumented functions should not be used. SPI.transfer()
  979. // polls the hardware flag which is automatically cleared as the
  980. // AVR responds to SPI's interrupt
  981. inline static void attachInterrupt() { }
  982. inline static void detachInterrupt() { }
  983. // Teensy LC can use alternate pins for these 3 SPI signals.
  984. inline static void setMOSI(uint8_t pin) __attribute__((always_inline)) {
  985. SPCR.setMOSI(pin);
  986. }
  987. inline static void setMISO(uint8_t pin) __attribute__((always_inline)) {
  988. SPCR.setMISO(pin);
  989. }
  990. inline static void setSCK(uint8_t pin) __attribute__((always_inline)) {
  991. SPCR.setSCK(pin);
  992. }
  993. // return true if "pin" has special chip select capability
  994. static bool pinIsChipSelect(uint8_t pin) { return (pin == 10 || pin == 2); }
  995. // return true if both pin1 and pin2 have independent chip select capability
  996. static bool pinIsChipSelect(uint8_t pin1, uint8_t pin2) { return false; }
  997. // configure a pin for chip select and return its SPI_MCR_PCSIS bitmask
  998. static uint8_t setCS(uint8_t pin);
  999. private:
  1000. static uint32_t interruptMask;
  1001. static uint32_t interruptSave;
  1002. #ifdef SPI_TRANSACTION_MISMATCH_LED
  1003. static uint8_t inTransactionFlag;
  1004. #endif
  1005. };
  1006. class SPI1Class {
  1007. public:
  1008. // Initialize the SPI library
  1009. static void begin();
  1010. // If SPI is to used from within an interrupt, this function registers
  1011. // that interrupt with the SPI library, so beginTransaction() can
  1012. // prevent conflicts. The input interruptNumber is the number used
  1013. // with attachInterrupt. If SPI is used from a different interrupt
  1014. // (eg, a timer), interruptNumber should be 255.
  1015. static void usingInterrupt(uint8_t n) {
  1016. if (n == 3 || n == 4) {
  1017. usingInterrupt(IRQ_PORTA);
  1018. } else if ((n >= 2 && n <= 15) || (n >= 20 && n <= 23)) {
  1019. usingInterrupt(IRQ_PORTCD);
  1020. }
  1021. }
  1022. static void usingInterrupt(IRQ_NUMBER_t interruptName) {
  1023. uint32_t n = (uint32_t)interruptName;
  1024. if (n < NVIC_NUM_INTERRUPTS) interruptMask |= (1 << n);
  1025. }
  1026. static void notUsingInterrupt(IRQ_NUMBER_t interruptName) {
  1027. uint32_t n = (uint32_t)interruptName;
  1028. if (n < NVIC_NUM_INTERRUPTS) interruptMask &= ~(1 << n);
  1029. }
  1030. // Before using SPI.transfer() or asserting chip select pins,
  1031. // this function is used to gain exclusive access to the SPI bus
  1032. // and configure the correct settings.
  1033. inline static void beginTransaction(SPISettings settings) {
  1034. if (interruptMask) {
  1035. __disable_irq();
  1036. interruptSave = NVIC_ICER0 & interruptMask;
  1037. NVIC_ICER0 = interruptSave;
  1038. __enable_irq();
  1039. }
  1040. #ifdef SPI_TRANSACTION_MISMATCH_LED
  1041. if (inTransactionFlag) {
  1042. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  1043. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  1044. }
  1045. inTransactionFlag = 1;
  1046. #endif
  1047. SPI1_C1 = settings.c1;
  1048. SPI1_BR = settings.br1;
  1049. }
  1050. // Write to the SPI bus (MOSI pin) and also receive (MISO pin)
  1051. inline static uint8_t transfer(uint8_t data) {
  1052. SPI1_DL = data;
  1053. while (!(SPI1_S & SPI_S_SPRF)) ; // wait
  1054. return SPI1_DL;
  1055. }
  1056. inline static uint16_t transfer16(uint16_t data) {
  1057. SPI1_C2 = SPI_C2_SPIMODE;
  1058. SPI1_S;
  1059. SPI1_DL = data;
  1060. SPI1_DH = data >> 8;
  1061. while (!(SPI1_S & SPI_S_SPRF)) ; // wait
  1062. uint16_t r = SPI1_DL | (SPI1_DH << 8);
  1063. SPI1_C2 = 0;
  1064. SPI1_S;
  1065. return r;
  1066. }
  1067. inline static void transfer(void *buf, size_t count) {
  1068. if (count == 0) return;
  1069. uint8_t *p = (uint8_t *)buf;
  1070. while (!(SPI1_S & SPI_S_SPTEF)) ; // wait
  1071. SPI1_DL = *p;
  1072. while (--count > 0) {
  1073. uint8_t out = *(p + 1);
  1074. while (!(SPI1_S & SPI_S_SPTEF)) ; // wait
  1075. __disable_irq();
  1076. SPI1_DL = out;
  1077. while (!(SPI1_S & SPI_S_SPRF)) ; // wait
  1078. uint8_t in = SPI1_DL;
  1079. __enable_irq();
  1080. *p++ = in;
  1081. }
  1082. while (!(SPI1_S & SPI_S_SPRF)) ; // wait
  1083. *p = SPDR;
  1084. }
  1085. // After performing a group of transfers and releasing the chip select
  1086. // signal, this function allows others to access the SPI bus
  1087. inline static void endTransaction(void) {
  1088. #ifdef SPI_TRANSACTION_MISMATCH_LED
  1089. if (!inTransactionFlag) {
  1090. pinMode(SPI_TRANSACTION_MISMATCH_LED, OUTPUT);
  1091. digitalWrite(SPI_TRANSACTION_MISMATCH_LED, HIGH);
  1092. }
  1093. inTransactionFlag = 0;
  1094. #endif
  1095. if (interruptMask) {
  1096. NVIC_ISER0 = interruptSave;
  1097. }
  1098. }
  1099. // Disable the SPI bus
  1100. static void end();
  1101. // This function is deprecated. New applications should use
  1102. // beginTransaction() to configure SPI settings.
  1103. static void setBitOrder(uint8_t bitOrder) {
  1104. uint8_t c = SPI1_C1 | SPI_C1_SPE;
  1105. if (bitOrder == LSBFIRST) c |= SPI_C1_LSBFE;
  1106. else c &= ~SPI_C1_LSBFE;
  1107. SPI1_C1 = c;
  1108. }
  1109. // This function is deprecated. New applications should use
  1110. // beginTransaction() to configure SPI settings.
  1111. static void setDataMode(uint8_t dataMode) {
  1112. uint8_t c = SPI1_C1 | SPI_C1_SPE;
  1113. if (dataMode & 0x04) c |= SPI_C1_CPHA;
  1114. else c &= ~SPI_C1_CPHA;
  1115. if (dataMode & 0x08) c |= SPI_C1_CPOL;
  1116. else c &= ~SPI_C1_CPOL;
  1117. SPI1_C1 = c;
  1118. }
  1119. // This function is deprecated. New applications should use
  1120. // beginTransaction() to configure SPI settings.
  1121. inline static void setClockDivider(uint8_t clockDiv) {
  1122. if (clockDiv == SPI_CLOCK_DIV2) {
  1123. SPI1_BR = (SPISettings(12000000, MSBFIRST, SPI_MODE0).br1);
  1124. } else if (clockDiv == SPI_CLOCK_DIV4) {
  1125. SPI1_BR = (SPISettings(4000000, MSBFIRST, SPI_MODE0).br1);
  1126. } else if (clockDiv == SPI_CLOCK_DIV8) {
  1127. SPI1_BR = (SPISettings(2000000, MSBFIRST, SPI_MODE0).br1);
  1128. } else if (clockDiv == SPI_CLOCK_DIV16) {
  1129. SPI1_BR = (SPISettings(1000000, MSBFIRST, SPI_MODE0).br1);
  1130. } else if (clockDiv == SPI_CLOCK_DIV32) {
  1131. SPI1_BR = (SPISettings(500000, MSBFIRST, SPI_MODE0).br1);
  1132. } else if (clockDiv == SPI_CLOCK_DIV64) {
  1133. SPI1_BR = (SPISettings(250000, MSBFIRST, SPI_MODE0).br1);
  1134. } else { /* clockDiv == SPI_CLOCK_DIV128 */
  1135. SPI1_BR = (SPISettings(125000, MSBFIRST, SPI_MODE0).br1);
  1136. }
  1137. }
  1138. // These undocumented functions should not be used. SPI.transfer()
  1139. // polls the hardware flag which is automatically cleared as the
  1140. // AVR responds to SPI's interrupt
  1141. inline static void attachInterrupt() { }
  1142. inline static void detachInterrupt() { }
  1143. // Teensy LC can use alternate pins for these 3 SPI signals.
  1144. inline static void setMOSI(uint8_t pin) __attribute__((always_inline)) {
  1145. SPCR1.setMOSI(pin);
  1146. }
  1147. inline static void setMISO(uint8_t pin) __attribute__((always_inline)) {
  1148. SPCR1.setMISO(pin);
  1149. }
  1150. inline static void setSCK(uint8_t pin) __attribute__((always_inline)) {
  1151. SPCR1.setSCK(pin);
  1152. }
  1153. // return true if "pin" has special chip select capability
  1154. static bool pinIsChipSelect(uint8_t pin) { return (pin == 6); }
  1155. // return true if both pin1 and pin2 have independent chip select capability
  1156. static bool pinIsChipSelect(uint8_t pin1, uint8_t pin2) { return false; }
  1157. // configure a pin for chip select and return its SPI_MCR_PCSIS bitmask
  1158. static uint8_t setCS(uint8_t pin);
  1159. private:
  1160. static uint32_t interruptMask;
  1161. static uint32_t interruptSave;
  1162. #ifdef SPI_TRANSACTION_MISMATCH_LED
  1163. static uint8_t inTransactionFlag;
  1164. #endif
  1165. };
  1166. /**********************************************************/
  1167. /* 32 bit Arduino Due */
  1168. /**********************************************************/
  1169. #elif defined(__arm__) && defined(__SAM3X8E__)
  1170. #undef SPI_MODE0
  1171. #undef SPI_MODE1
  1172. #undef SPI_MODE2
  1173. #undef SPI_MODE3
  1174. #define SPI_MODE0 0x02
  1175. #define SPI_MODE1 0x00
  1176. #define SPI_MODE2 0x03
  1177. #define SPI_MODE3 0x01
  1178. #undef SPI_CLOCK_DIV2
  1179. #undef SPI_CLOCK_DIV4
  1180. #undef SPI_CLOCK_DIV8
  1181. #undef SPI_CLOCK_DIV16
  1182. #undef SPI_CLOCK_DIV32
  1183. #undef SPI_CLOCK_DIV64
  1184. #undef SPI_CLOCK_DIV128
  1185. #define SPI_CLOCK_DIV2 11
  1186. #define SPI_CLOCK_DIV4 21
  1187. #define SPI_CLOCK_DIV8 42
  1188. #define SPI_CLOCK_DIV16 84
  1189. #define SPI_CLOCK_DIV32 168
  1190. #define SPI_CLOCK_DIV64 255
  1191. #define SPI_CLOCK_DIV128 255
  1192. enum SPITransferMode {
  1193. SPI_CONTINUE,
  1194. SPI_LAST
  1195. };
  1196. class SPISettings {
  1197. public:
  1198. SPISettings(uint32_t clock, BitOrder bitOrder, uint8_t dataMode) {
  1199. if (__builtin_constant_p(clock)) {
  1200. init_AlwaysInline(clock, bitOrder, dataMode);
  1201. } else {
  1202. init_MightInline(clock, bitOrder, dataMode);
  1203. }
  1204. }
  1205. SPISettings() {
  1206. init_AlwaysInline(4000000, MSBFIRST, SPI_MODE0);
  1207. }
  1208. private:
  1209. void init_MightInline(uint32_t clock, BitOrder bitOrder, uint8_t dataMode) {
  1210. init_AlwaysInline(clock, bitOrder, dataMode);
  1211. }
  1212. void init_AlwaysInline(uint32_t clock, BitOrder bitOrder, uint8_t dataMode)
  1213. __attribute__((__always_inline__)) {
  1214. uint8_t div;
  1215. border = bitOrder;
  1216. if (__builtin_constant_p(clock)) {
  1217. if (clock >= F_CPU / 2) div = 2;
  1218. else if (clock >= F_CPU / 3) div = 3;
  1219. else if (clock >= F_CPU / 4) div = 4;
  1220. else if (clock >= F_CPU / 5) div = 5;
  1221. else if (clock >= F_CPU / 6) div = 6;
  1222. else if (clock >= F_CPU / 7) div = 7;
  1223. else if (clock >= F_CPU / 8) div = 8;
  1224. else if (clock >= F_CPU / 9) div = 9;
  1225. else if (clock >= F_CPU / 10) div = 10;
  1226. else if (clock >= F_CPU / 11) div = 11;
  1227. else if (clock >= F_CPU / 12) div = 12;
  1228. else if (clock >= F_CPU / 13) div = 13;
  1229. else if (clock >= F_CPU / 14) div = 14;
  1230. else if (clock >= F_CPU / 15) div = 15;
  1231. else if (clock >= F_CPU / 16) div = 16;
  1232. else if (clock >= F_CPU / 17) div = 17;
  1233. else if (clock >= F_CPU / 18) div = 18;
  1234. else if (clock >= F_CPU / 19) div = 19;
  1235. else if (clock >= F_CPU / 20) div = 20;
  1236. else if (clock >= F_CPU / 21) div = 21;
  1237. else if (clock >= F_CPU / 22) div = 22;
  1238. else if (clock >= F_CPU / 23) div = 23;
  1239. else if (clock >= F_CPU / 24) div = 24;
  1240. else if (clock >= F_CPU / 25) div = 25;
  1241. else if (clock >= F_CPU / 26) div = 26;
  1242. else if (clock >= F_CPU / 27) div = 27;
  1243. else if (clock >= F_CPU / 28) div = 28;
  1244. else if (clock >= F_CPU / 29) div = 29;
  1245. else if (clock >= F_CPU / 30) div = 30;
  1246. else if (clock >= F_CPU / 31) div = 31;
  1247. else if (clock >= F_CPU / 32) div = 32;
  1248. else if (clock >= F_CPU / 33) div = 33;
  1249. else if (clock >= F_CPU / 34) div = 34;
  1250. else if (clock >= F_CPU / 35) div = 35;
  1251. else if (clock >= F_CPU / 36) div = 36;
  1252. else if (clock >= F_CPU / 37) div = 37;
  1253. else if (clock >= F_CPU / 38) div = 38;
  1254. else if (clock >= F_CPU / 39) div = 39;
  1255. else if (clock >= F_CPU / 40) div = 40;
  1256. else if (clock >= F_CPU / 41) div = 41;
  1257. else if (clock >= F_CPU / 42) div = 42;
  1258. else if (clock >= F_CPU / 43) div = 43;
  1259. else if (clock >= F_CPU / 44) div = 44;
  1260. else if (clock >= F_CPU / 45) div = 45;
  1261. else if (clock >= F_CPU / 46) div = 46;
  1262. else if (clock >= F_CPU / 47) div = 47;
  1263. else if (clock >= F_CPU / 48) div = 48;
  1264. else if (clock >= F_CPU / 49) div = 49;
  1265. else if (clock >= F_CPU / 50) div = 50;
  1266. else if (clock >= F_CPU / 51) div = 51;
  1267. else if (clock >= F_CPU / 52) div = 52;
  1268. else if (clock >= F_CPU / 53) div = 53;
  1269. else if (clock >= F_CPU / 54) div = 54;
  1270. else if (clock >= F_CPU / 55) div = 55;
  1271. else if (clock >= F_CPU / 56) div = 56;
  1272. else if (clock >= F_CPU / 57) div = 57;
  1273. else if (clock >= F_CPU / 58) div = 58;
  1274. else if (clock >= F_CPU / 59) div = 59;
  1275. else if (clock >= F_CPU / 60) div = 60;
  1276. else if (clock >= F_CPU / 61) div = 61;
  1277. else if (clock >= F_CPU / 62) div = 62;
  1278. else if (clock >= F_CPU / 63) div = 63;
  1279. else if (clock >= F_CPU / 64) div = 64;
  1280. else if (clock >= F_CPU / 65) div = 65;
  1281. else if (clock >= F_CPU / 66) div = 66;
  1282. else if (clock >= F_CPU / 67) div = 67;
  1283. else if (clock >= F_CPU / 68) div = 68;
  1284. else if (clock >= F_CPU / 69) div = 69;
  1285. else if (clock >= F_CPU / 70) div = 70;
  1286. else if (clock >= F_CPU / 71) div = 71;
  1287. else if (clock >= F_CPU / 72) div = 72;
  1288. else if (clock >= F_CPU / 73) div = 73;
  1289. else if (clock >= F_CPU / 74) div = 74;
  1290. else if (clock >= F_CPU / 75) div = 75;
  1291. else if (clock >= F_CPU / 76) div = 76;
  1292. else if (clock >= F_CPU / 77) div = 77;
  1293. else if (clock >= F_CPU / 78) div = 78;
  1294. else if (clock >= F_CPU / 79) div = 79;
  1295. else if (clock >= F_CPU / 80) div = 80;
  1296. else if (clock >= F_CPU / 81) div = 81;
  1297. else if (clock >= F_CPU / 82) div = 82;
  1298. else if (clock >= F_CPU / 83) div = 83;
  1299. else if (clock >= F_CPU / 84) div = 84;
  1300. else if (clock >= F_CPU / 85) div = 85;
  1301. else if (clock >= F_CPU / 86) div = 86;
  1302. else if (clock >= F_CPU / 87) div = 87;
  1303. else if (clock >= F_CPU / 88) div = 88;
  1304. else if (clock >= F_CPU / 89) div = 89;
  1305. else if (clock >= F_CPU / 90) div = 90;
  1306. else if (clock >= F_CPU / 91) div = 91;
  1307. else if (clock >= F_CPU / 92) div = 92;
  1308. else if (clock >= F_CPU / 93) div = 93;
  1309. else if (clock >= F_CPU / 94) div = 94;
  1310. else if (clock >= F_CPU / 95) div = 95;
  1311. else if (clock >= F_CPU / 96) div = 96;
  1312. else if (clock >= F_CPU / 97) div = 97;
  1313. else if (clock >= F_CPU / 98) div = 98;
  1314. else if (clock >= F_CPU / 99) div = 99;
  1315. else if (clock >= F_CPU / 100) div = 100;
  1316. else if (clock >= F_CPU / 101) div = 101;
  1317. else if (clock >= F_CPU / 102) div = 102;
  1318. else if (clock >= F_CPU / 103) div = 103;
  1319. else if (clock >= F_CPU / 104) div = 104;
  1320. else if (clock >= F_CPU / 105) div = 105;
  1321. else if (clock >= F_CPU / 106) div = 106;
  1322. else if (clock >= F_CPU / 107) div = 107;
  1323. else if (clock >= F_CPU / 108) div = 108;
  1324. else if (clock >= F_CPU / 109) div = 109;
  1325. else if (clock >= F_CPU / 110) div = 110;
  1326. else if (clock >= F_CPU / 111) div = 111;
  1327. else if (clock >= F_CPU / 112) div = 112;
  1328. else if (clock >= F_CPU / 113) div = 113;
  1329. else if (clock >= F_CPU / 114) div = 114;
  1330. else if (clock >= F_CPU / 115) div = 115;
  1331. else if (clock >= F_CPU / 116) div = 116;
  1332. else if (clock >= F_CPU / 117) div = 117;
  1333. else if (clock >= F_CPU / 118) div = 118;
  1334. else if (clock >= F_CPU / 119) div = 119;
  1335. else if (clock >= F_CPU / 120) div = 120;
  1336. else if (clock >= F_CPU / 121) div = 121;
  1337. else if (clock >= F_CPU / 122) div = 122;
  1338. else if (clock >= F_CPU / 123) div = 123;
  1339. else if (clock >= F_CPU / 124) div = 124;
  1340. else if (clock >= F_CPU / 125) div = 125;
  1341. else if (clock >= F_CPU / 126) div = 126;
  1342. else if (clock >= F_CPU / 127) div = 127;
  1343. else if (clock >= F_CPU / 128) div = 128;
  1344. else if (clock >= F_CPU / 129) div = 129;
  1345. else if (clock >= F_CPU / 130) div = 130;
  1346. else if (clock >= F_CPU / 131) div = 131;
  1347. else if (clock >= F_CPU / 132) div = 132;
  1348. else if (clock >= F_CPU / 133) div = 133;
  1349. else if (clock >= F_CPU / 134) div = 134;
  1350. else if (clock >= F_CPU / 135) div = 135;
  1351. else if (clock >= F_CPU / 136) div = 136;
  1352. else if (clock >= F_CPU / 137) div = 137;
  1353. else if (clock >= F_CPU / 138) div = 138;
  1354. else if (clock >= F_CPU / 139) div = 139;
  1355. else if (clock >= F_CPU / 140) div = 140;
  1356. else if (clock >= F_CPU / 141) div = 141;
  1357. else if (clock >= F_CPU / 142) div = 142;
  1358. else if (clock >= F_CPU / 143) div = 143;
  1359. else if (clock >= F_CPU / 144) div = 144;
  1360. else if (clock >= F_CPU / 145) div = 145;
  1361. else if (clock >= F_CPU / 146) div = 146;
  1362. else if (clock >= F_CPU / 147) div = 147;
  1363. else if (clock >= F_CPU / 148) div = 148;
  1364. else if (clock >= F_CPU / 149) div = 149;
  1365. else if (clock >= F_CPU / 150) div = 150;
  1366. else if (clock >= F_CPU / 151) div = 151;
  1367. else if (clock >= F_CPU / 152) div = 152;
  1368. else if (clock >= F_CPU / 153) div = 153;
  1369. else if (clock >= F_CPU / 154) div = 154;
  1370. else if (clock >= F_CPU / 155) div = 155;
  1371. else if (clock >= F_CPU / 156) div = 156;
  1372. else if (clock >= F_CPU / 157) div = 157;
  1373. else if (clock >= F_CPU / 158) div = 158;
  1374. else if (clock >= F_CPU / 159) div = 159;
  1375. else if (clock >= F_CPU / 160) div = 160;
  1376. else if (clock >= F_CPU / 161) div = 161;
  1377. else if (clock >= F_CPU / 162) div = 162;
  1378. else if (clock >= F_CPU / 163) div = 163;
  1379. else if (clock >= F_CPU / 164) div = 164;
  1380. else if (clock >= F_CPU / 165) div = 165;
  1381. else if (clock >= F_CPU / 166) div = 166;
  1382. else if (clock >= F_CPU / 167) div = 167;
  1383. else if (clock >= F_CPU / 168) div = 168;
  1384. else if (clock >= F_CPU / 169) div = 169;
  1385. else if (clock >= F_CPU / 170) div = 170;
  1386. else if (clock >= F_CPU / 171) div = 171;
  1387. else if (clock >= F_CPU / 172) div = 172;
  1388. else if (clock >= F_CPU / 173) div = 173;
  1389. else if (clock >= F_CPU / 174) div = 174;
  1390. else if (clock >= F_CPU / 175) div = 175;
  1391. else if (clock >= F_CPU / 176) div = 176;
  1392. else if (clock >= F_CPU / 177) div = 177;
  1393. else if (clock >= F_CPU / 178) div = 178;
  1394. else if (clock >= F_CPU / 179) div = 179;
  1395. else if (clock >= F_CPU / 180) div = 180;
  1396. else if (clock >= F_CPU / 181) div = 181;
  1397. else if (clock >= F_CPU / 182) div = 182;
  1398. else if (clock >= F_CPU / 183) div = 183;
  1399. else if (clock >= F_CPU / 184) div = 184;
  1400. else if (clock >= F_CPU / 185) div = 185;
  1401. else if (clock >= F_CPU / 186) div = 186;
  1402. else if (clock >= F_CPU / 187) div = 187;
  1403. else if (clock >= F_CPU / 188) div = 188;
  1404. else if (clock >= F_CPU / 189) div = 189;
  1405. else if (clock >= F_CPU / 190) div = 190;
  1406. else if (clock >= F_CPU / 191) div = 191;
  1407. else if (clock >= F_CPU / 192) div = 192;
  1408. else if (clock >= F_CPU / 193) div = 193;
  1409. else if (clock >= F_CPU / 194) div = 194;
  1410. else if (clock >= F_CPU / 195) div = 195;
  1411. else if (clock >= F_CPU / 196) div = 196;
  1412. else if (clock >= F_CPU / 197) div = 197;
  1413. else if (clock >= F_CPU / 198) div = 198;
  1414. else if (clock >= F_CPU / 199) div = 199;
  1415. else if (clock >= F_CPU / 200) div = 200;
  1416. else if (clock >= F_CPU / 201) div = 201;
  1417. else if (clock >= F_CPU / 202) div = 202;
  1418. else if (clock >= F_CPU / 203) div = 203;
  1419. else if (clock >= F_CPU / 204) div = 204;
  1420. else if (clock >= F_CPU / 205) div = 205;
  1421. else if (clock >= F_CPU / 206) div = 206;
  1422. else if (clock >= F_CPU / 207) div = 207;
  1423. else if (clock >= F_CPU / 208) div = 208;
  1424. else if (clock >= F_CPU / 209) div = 209;
  1425. else if (clock >= F_CPU / 210) div = 210;
  1426. else if (clock >= F_CPU / 211) div = 211;
  1427. else if (clock >= F_CPU / 212) div = 212;
  1428. else if (clock >= F_CPU / 213) div = 213;
  1429. else if (clock >= F_CPU / 214) div = 214;
  1430. else if (clock >= F_CPU / 215) div = 215;
  1431. else if (clock >= F_CPU / 216) div = 216;
  1432. else if (clock >= F_CPU / 217) div = 217;
  1433. else if (clock >= F_CPU / 218) div = 218;
  1434. else if (clock >= F_CPU / 219) div = 219;
  1435. else if (clock >= F_CPU / 220) div = 220;
  1436. else if (clock >= F_CPU / 221) div = 221;
  1437. else if (clock >= F_CPU / 222) div = 222;
  1438. else if (clock >= F_CPU / 223) div = 223;
  1439. else if (clock >= F_CPU / 224) div = 224;
  1440. else if (clock >= F_CPU / 225) div = 225;
  1441. else if (clock >= F_CPU / 226) div = 226;
  1442. else if (clock >= F_CPU / 227) div = 227;
  1443. else if (clock >= F_CPU / 228) div = 228;
  1444. else if (clock >= F_CPU / 229) div = 229;
  1445. else if (clock >= F_CPU / 230) div = 230;
  1446. else if (clock >= F_CPU / 231) div = 231;
  1447. else if (clock >= F_CPU / 232) div = 232;
  1448. else if (clock >= F_CPU / 233) div = 233;
  1449. else if (clock >= F_CPU / 234) div = 234;
  1450. else if (clock >= F_CPU / 235) div = 235;
  1451. else if (clock >= F_CPU / 236) div = 236;
  1452. else if (clock >= F_CPU / 237) div = 237;
  1453. else if (clock >= F_CPU / 238) div = 238;
  1454. else if (clock >= F_CPU / 239) div = 239;
  1455. else if (clock >= F_CPU / 240) div = 240;
  1456. else if (clock >= F_CPU / 241) div = 241;
  1457. else if (clock >= F_CPU / 242) div = 242;
  1458. else if (clock >= F_CPU / 243) div = 243;
  1459. else if (clock >= F_CPU / 244) div = 244;
  1460. else if (clock >= F_CPU / 245) div = 245;
  1461. else if (clock >= F_CPU / 246) div = 246;
  1462. else if (clock >= F_CPU / 247) div = 247;
  1463. else if (clock >= F_CPU / 248) div = 248;
  1464. else if (clock >= F_CPU / 249) div = 249;
  1465. else if (clock >= F_CPU / 250) div = 250;
  1466. else if (clock >= F_CPU / 251) div = 251;
  1467. else if (clock >= F_CPU / 252) div = 252;
  1468. else if (clock >= F_CPU / 253) div = 253;
  1469. else if (clock >= F_CPU / 254) div = 254;
  1470. else /* clock >= F_CPU / 255 */ div = 255;
  1471. /*
  1472. #! /usr/bin/perl
  1473. for ($i=2; $i<256; $i++) {
  1474. printf "\t\t\telse if (clock >= F_CPU / %3d) div = %3d;\n", $i, $i;
  1475. }
  1476. */
  1477. } else {
  1478. for (div=2; div<255; div++) {
  1479. if (clock >= F_CPU / div) break;
  1480. }
  1481. }
  1482. config = (dataMode & 3) | SPI_CSR_CSAAT | SPI_CSR_SCBR(div) | SPI_CSR_DLYBCT(1);
  1483. }
  1484. uint32_t config;
  1485. BitOrder border;
  1486. friend class SPIClass;
  1487. };
  1488. class SPIClass {
  1489. public:
  1490. SPIClass(Spi *_spi, uint32_t _id, void(*_initCb)(void));
  1491. byte transfer(uint8_t _data, SPITransferMode _mode = SPI_LAST) { return transfer(BOARD_SPI_DEFAULT_SS, _data, _mode); }
  1492. byte transfer(byte _channel, uint8_t _data, SPITransferMode _mode = SPI_LAST);
  1493. // Transaction Functions
  1494. void usingInterrupt(uint8_t interruptNumber);
  1495. void beginTransaction(uint8_t pin, SPISettings settings);
  1496. void beginTransaction(SPISettings settings) {
  1497. beginTransaction(BOARD_SPI_DEFAULT_SS, settings);
  1498. }
  1499. void endTransaction(void);
  1500. // SPI Configuration methods
  1501. void attachInterrupt(void);
  1502. void detachInterrupt(void);
  1503. void begin(void);
  1504. void end(void);
  1505. // Attach/Detach pin to/from SPI controller
  1506. void begin(uint8_t _pin);
  1507. void end(uint8_t _pin);
  1508. // These methods sets a parameter on a single pin
  1509. void setBitOrder(uint8_t _pin, BitOrder);
  1510. void setDataMode(uint8_t _pin, uint8_t);
  1511. void setClockDivider(uint8_t _pin, uint8_t);
  1512. // These methods sets the same parameters but on default pin BOARD_SPI_DEFAULT_SS
  1513. void setBitOrder(BitOrder _order) { setBitOrder(BOARD_SPI_DEFAULT_SS, _order); };
  1514. void setDataMode(uint8_t _mode) { setDataMode(BOARD_SPI_DEFAULT_SS, _mode); };
  1515. void setClockDivider(uint8_t _div) { setClockDivider(BOARD_SPI_DEFAULT_SS, _div); };
  1516. private:
  1517. void init();
  1518. Spi *spi;
  1519. uint32_t id;
  1520. BitOrder bitOrder[SPI_CHANNELS_NUM];
  1521. uint32_t divider[SPI_CHANNELS_NUM];
  1522. uint32_t mode[SPI_CHANNELS_NUM];
  1523. void (*initCb)(void);
  1524. bool initialized;
  1525. uint8_t interruptMode; // 0=none, 1=mask, 2=global
  1526. uint8_t interruptMask; // bits 0:3=pin change
  1527. uint8_t interruptSave; // temp storage, to restore state
  1528. };
  1529. #endif
  1530. extern SPIClass SPI;
  1531. #if defined(__arm__) && defined(TEENSYDUINO) && defined(KINETISL)
  1532. extern SPI1Class SPI1;
  1533. #endif
  1534. #if defined(__MK64FX512__) || defined(__MK66FX1M0__)
  1535. extern SPI1Class SPI1;
  1536. #endif
  1537. #endif